Tony
Reworked your pin mux patch for OMAP34xx and made following changes after discussion with Gadyar Anand:
1) Incorporate comments of Klaus Pederson to introduce following states for pins:
(Instead of 12 values in the macro)
Active mode:
OMAP34xx_PIN_OUTPUT
OMAP34xx_PIN_INPUT
OMAP34xx_PIN_INPUT_PULLUP
OMAP34xx_PIN_INPUT_PULLDOWN
Off mode:
OMAP34xx_PIN_OFF_NONE
OMAP34xx_PIN_OFF_OUTPUT_HIGH
OMAP34xx_PIN_OFF_OUTPUT_LOW
OMAP34xx_PIN_OFF_INPUT_PULLUP
OMAP34xx_PIN_OFF_INPUT_PULLDOWN
OMAP34xx_PIN_OFF_WAKEUPENABLE
2) Bug fixes to get the patch working on OMAP34xx
- array size correction
- u8 to u16 changes for 34xx
3) Adds pin mux entries of USBHOST ehci pins for PHY mode as well as TLL mode
Acked-by: Anand Gadiyar <gadiyar@xxxxxx>
Signed-off-by: Vikram Pandita <vikram.pandita@xxxxxx>
Signed-off-by: Tony Lindgren <tony@xxxxxxxxxxx>
---
arch/arm/mach-omap2/mux.c | 265 +++++++++++++++++++++++++++++++++++++++-
include/asm-arm/arch-omap/mux.h | 128 +++++++++++++++++++
2 files changed, 390 insertions(+), 3 deletions(-)
Index: omap-submit/arch/arm/mach-omap2/mux.c
===================================================================
--- omap-submit.orig/arch/arm/mach-omap2/mux.c 2008-01-29 12:47:09.000000000 +0530
+++ omap-submit/arch/arm/mach-omap2/mux.c 2008-01-29 15:57:05.000000000 +0530
@@ -1,7 +1,7 @@
/*
* linux/arch/arm/mach-omap2/mux.c
*
- * OMAP2 pin multiplexing configurations
+ * OMAP2 and OMAP3 pin multiplexing configurations
*
* Copyright (C) 2004 - 2008 Texas Instruments Inc.
* Copyright (C) 2003 - 2008 Nokia Corporation
@@ -219,11 +219,226 @@
#define OMAP24XX_PINS_SZ 0
#endif /* CONFIG_ARCH_OMAP24XX */
+#ifdef CONFIG_ARCH_OMAP34XX
+static struct pin_config __initdata_or_module omap34xx_pins[] = {
+/*
+ * Name, reg-offset, mux-mode
+ * Active-mode state
+ * Off-mode state
+ */
+
+/* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
+MUX_CFG_34XX("Y8_3430_USB1HS_PHY_CLK", 0x5da, 3,
+ OMAP34xx_PIN_OUTPUT,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("Y9_3430_USB1HS_PHY_STP", 0x5d8, 3,
+ OMAP34xx_PIN_OUTPUT,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AA14_3430_USB1HS_PHY_DIR", 0x5ec, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AA11_3430_USB1HS_PHY_NXT", 0x5ee, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("W13_3430_USB1HS_PHY_D0", 0x5dc, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("W12_3430_USB1HS_PHY_D1", 0x5de, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("W11_3430_USB1HS_PHY_D2", 0x5e0, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("Y11_3430_USB1HS_PHY_D3", 0x5ea, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("W9_3430_USB1HS_PHY_D4", 0x5e4, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("Y12_3430_USB1HS_PHY_D5", 0x5e6, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("W8_3430_USB1HS_PHY_D6", 0x5e8, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("Y13_3430_USB1HS_PHY_D7", 0x5e2, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+
+/* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
+MUX_CFG_34XX("AA8_3430_USB2HS_PHY_CLK", 0x5f0, 3,
+ OMAP34xx_PIN_OUTPUT,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AA10_3430_USB2HS_PHY_STP", 0x5f2, 3,
+ OMAP34xx_PIN_OUTPUT,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AA9_3430_USB2HS_PHY_DIR", 0x5f4, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AB11_3430_USB2HS_PHY_NXT", 0x5f6, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AB10_3430_USB2HS_PHY_D0", 0x5f8, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AB9_3430_USB2HS_PHY_D1", 0x5fa, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("W3_3430_USB2HS_PHY_D2", 0x1d4, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("T4_3430_USB2HS_PHY_D3", 0x1de, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("T3_3430_USB2HS_PHY_D4", 0x1d8, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("R3_3430_USB2HS_PHY_D5", 0x1da, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("R4_3430_USB2HS_PHY_D6", 0x1dc, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("T2_3430_USB2HS_PHY_D7", 0x1d6, 3,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+
+/* TLL - HSUSB: 12-pin TLL Port 1*/
+MUX_CFG_34XX("Y8_3430_USB1HS_TLL_CLK", 0x5da, 6,
+ OMAP34xx_PIN_OUTPUT,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("Y9_3430_USB1HS_TLL_STP", 0x5d8, 6,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AA14_3430_USB1HS_TLL_DIR", 0x5ec, 6,
+ OMAP34xx_PIN_OUTPUT,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AA11_3430_USB1HS_TLL_NXT", 0x5ee, 6,
+ OMAP34xx_PIN_OUTPUT,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("W13_3430_USB1HS_TLL_D0", 0x5dc, 6,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("W12_3430_USB1HS_TLL_D1", 0x5de, 6,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("W11_3430_USB1HS_TLL_D2", 0x5e0, 6,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("Y11_3430_USB1HS_TLL_D3", 0x5ea, 6,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("W9_3430_USB1HS_TLL_D4", 0x5e4, 6,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("Y12_3430_USB1HS_TLL_D5", 0x5e6, 6,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("W8_3430_USB1HS_TLL_D6", 0x5e8, 6,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("Y13_3430_USB1HS_TLL_D7", 0x5e2, 6,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+
+/* TLL - HSUSB: 12-pin TLL Port 2*/
+MUX_CFG_34XX("AA8_3430_USB2HS_TLL_CLK", 0x5f0, 6,
+ OMAP34xx_PIN_OUTPUT,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AA10_3430_USB2HS_TLL_STP", 0x5f2, 6,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AA9_3430_USB2HS_TLL_DIR", 0x5f4, 6,
+ OMAP34xx_PIN_OUTPUT,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AB11_3430_USB2HS_TLL_NXT", 0x5f6, 6,
+ OMAP34xx_PIN_OUTPUT,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AB10_3430_USB2HS_TLL_D0", 0x5f8, 6,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AB9_3430_USB2HS_TLL_D1", 0x5fa, 6,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("W3_3430_USB2HS_TLL_D2", 0x1d4, 2,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("T4_3430_USB2HS_TLL_D3", 0x1de, 2,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("T3_3430_USB2HS_TLL_D4", 0x1d8, 2,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("R3_3430_USB2HS_TLL_D5", 0x1da, 2,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("R4_3430_USB2HS_TLL_D6", 0x1dc, 2,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("T2_3430_USB2HS_TLL_D7", 0x1d6, 2,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+
+/* TLL - HSUSB: 12-pin TLL Port 3*/
+MUX_CFG_34XX("AA6_3430_USB3HS_TLL_CLK", 0x180, 5,
+ OMAP34xx_PIN_OUTPUT,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AB3_3430_USB3HS_TLL_STP", 0x166, 5,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AA3_3430_USB3HS_TLL_DIR", 0x168, 5,
+ OMAP34xx_PIN_OUTPUT,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("Y3_3430_USB3HS_TLL_NXT", 0x16a, 5,
+ OMAP34xx_PIN_OUTPUT,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AA5_3430_USB3HS_TLL_D0", 0x186, 5,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("Y4_3430_USB3HS_TLL_D1", 0x184, 5,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("Y5_3430_USB3HS_TLL_D2", 0x188, 5,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("W5_3430_USB3HS_TLL_D3", 0x18a, 5,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AB12_3430_USB3HS_TLL_D4", 0x16c, 5,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AB13_3430_USB3HS_TLL_D5", 0x16e, 5,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AA13_3430_USB3HS_TLL_D6", 0x170, 5,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+MUX_CFG_34XX("AA12_3430_USB3HS_TLL_D7", 0x172, 5,
+ OMAP34xx_PIN_INPUT_PULLDOWN,
+ OMAP34xx_PIN_OFF_NONE)
+};
+
+#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins)
+
+#else
+#define omap34xx_pins NULL
+#define OMAP34XX_PINS_SZ 0
+#endif /* CONFIG_ARCH_OMAP34XX */
+
#define OMAP24XX_PULL_ENA (1 << 3)
#define OMAP24XX_PULL_UP (1 << 4)
+#define OMAP3_INPUT_EN (1 << 8)
+#define OMAP3_OFF_EN (1 << 9)
+#define OMAP3_OFFOUT_EN (1 << 10)
+#define OMAP3_OFFOUT_VAL (1 << 11)
+#define OMAP3_OFF_PULL_EN (1 << 12)
+#define OMAP3_OFF_PULL_UP (1 << 13)
+#define OMAP3_WAKEUP_EN (1 << 14)
+
+
#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
-void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u8 reg)
+void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u16 reg)
{
u16 orig;
u8 warn = 0, debug = 0;
@@ -239,7 +454,7 @@
warn = (orig != reg);
if (debug || warn)
printk(KERN_WARNING
- "MUX: setup %s (0x%08x): 0x%02x -> 0x%02x\n",
+ "MUX: setup %s (0x%08x): 0x%04x -> 0x%04x\n",
cfg->name, omap_ctrl_base_get() + cfg->mux_reg,
orig, reg);
}
@@ -270,6 +485,44 @@
#define omap24xx_cfg_reg 0
#endif
+#ifdef CONFIG_ARCH_OMAP34XX
+/* REVISIT: Convert this code to use ctrl_{read,write}_reg */
+int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
+{
+ static DEFINE_SPINLOCK(mux_spin_lock);
+ unsigned long flags;
+ u16 reg = 0;
+
+ spin_lock_irqsave(&mux_spin_lock, flags);
+ reg |= cfg->mask & 0x7;
+ if (cfg->pullenable)
+ reg |= OMAP24XX_PULL_ENA;
+ if (cfg->pull_val)
+ reg |= OMAP24XX_PULL_UP;
+ if (cfg->input_enable)
+ reg |= OMAP3_INPUT_EN;
+ if (cfg->offenable)
+ reg |= OMAP3_OFF_EN;
+ if (cfg->offoutenable)
+ reg |= OMAP3_OFFOUT_EN;
+ if (cfg->offoutvalue)
+ reg |= OMAP3_OFFOUT_VAL;
+ if (cfg->offpulludenable)
+ reg |= OMAP3_OFF_PULL_EN;
+ if (cfg->offpulltypeselect)
+ reg |= OMAP3_OFF_PULL_UP;
+ if (cfg->wakeupenable)
+ reg |= OMAP3_WAKEUP_EN;
+ omap2_cfg_debug(cfg, reg);
+ omap_ctrl_writew(reg, cfg->mux_reg);
+ spin_unlock_irqrestore(&mux_spin_lock, flags);
+
+ return 0;
+}
+#else
+#define omap34xx_cfg_reg 0
+#endif
+
int __init omap2_mux_init(void)
{
if (cpu_is_omap24xx()) {
@@ -278,6 +531,12 @@
arch_mux_cfg.cfg_reg = omap24xx_cfg_reg;
}
+ if (cpu_is_omap34xx()) {
+ arch_mux_cfg.pins = omap34xx_pins;
+ arch_mux_cfg.size = OMAP34XX_PINS_SZ;
+ arch_mux_cfg.cfg_reg = omap34xx_cfg_reg;
+ }
+
return omap_mux_register(&arch_mux_cfg);
}
Index: omap-submit/include/asm-arm/arch-omap/mux.h
===================================================================
--- omap-submit.orig/include/asm-arm/arch-omap/mux.h 2008-01-29 12:47:09.000000000 +0530
+++ omap-submit/include/asm-arm/arch-omap/mux.h 2008-01-29 16:11:43.000000000 +0530
@@ -125,6 +125,49 @@
.pu_pd_val = pull_mode, \
},
+ /* OMAP34xx Pin States */
+enum omap34xx_pin_active_state {
+ /* Active Mode states */
+ OMAP34xx_PIN_OUTPUT = 0, /* Output pin */
+ OMAP34xx_PIN_INPUT = 1, /* Input no pull enable */
+ OMAP34xx_PIN_INPUT_PULLUP = 2, /* pullup */
+ OMAP34xx_PIN_INPUT_PULLDOWN = 4 /* pulldown */
+};
+
+enum omap34xx_pin_off_state {
+ /* Off Mode States */
+ OMAP34xx_PIN_OFF_NONE = 0,
+ OMAP34xx_PIN_OFF_OUTPUT_HIGH = 1,
+ OMAP34xx_PIN_OFF_OUTPUT_LOW = 2,
+ OMAP34xx_PIN_OFF_INPUT_PULLUP = 4,
+ OMAP34xx_PIN_OFF_INPUT_PULLDOWN = 8,
+ OMAP34xx_PIN_OFF_WAKEUPENABLE = 16
+};
+
+#define MUX_CFG_34XX(desc, reg_offset, mode, active_state, off_state) {\
+ .name = desc, \
+ .debug = 0, \
+ .mux_reg = reg_offset, \
+ .mask = mode, \
+ .pullenable =\
+ active_state & (OMAP34xx_PIN_INPUT_PULLUP | OMAP34xx_PIN_INPUT_PULLDOWN)?1:0,\
+ .pull_val =\
+ active_state & OMAP34xx_PIN_INPUT_PULLUP?1:0,\
+ .input_enable =\
+ active_state & (OMAP34xx_PIN_INPUT_PULLUP | OMAP34xx_PIN_INPUT_PULLDOWN | OMAP34xx_PIN_INPUT)?1:0,\
+ .offenable =\
+ off_state?1:0,\
+ .offoutenable =\
+ off_state & (OMAP34xx_PIN_OFF_OUTPUT_HIGH | OMAP34xx_PIN_OFF_OUTPUT_LOW)?1:0,\
+ .offoutvalue =\
+ off_state & OMAP34xx_PIN_OFF_OUTPUT_HIGH?1:0,\
+ .offpulludenable =\
+ off_state & (OMAP34xx_PIN_OFF_INPUT_PULLUP | OMAP34xx_PIN_OFF_INPUT_PULLDOWN)?1:0,\
+ .offpulltypeselect =\
+ off_state & OMAP34xx_PIN_OFF_INPUT_PULLUP?1:0,\
+ .wakeupenable =\
+ off_state & OMAP34xx_PIN_OFF_WAKEUPENABLE?1:0\
+},
#define PULL_DISABLED 0
#define PULL_ENABLED 1
@@ -150,6 +193,15 @@
const char *pu_pd_name;
const unsigned int pu_pd_reg;
const unsigned char pu_pd_val;
+
+ const unsigned pullenable:1;
+ const unsigned input_enable:1;
+ const unsigned offenable:1;
+ const unsigned offoutenable:1;
+ const unsigned offoutvalue:1;
+ const unsigned offpulludenable:1;
+ const unsigned offpulltypeselect:1;
+ const unsigned wakeupenable:1;
};
enum omap730_index {
@@ -590,6 +642,82 @@
AD16_2430_MCBSP2_CLX_OFF,
AE13_2430_MCBSP2_DX_OFF,
AD13_2430_MCBSP2_DR_OFF,
+
+};
+
+enum omap34xx_index {
+
+ /* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
+ Y8_3430_USB1HS_PHY_CLK,
+ Y9_3430_USB1HS_PHY_STP,
+ AA14_3430_USB1HS_PHY_DIR,
+ AA11_3430_USB1HS_PHY_NXT,
+ W13_3430_USB1HS_PHY_DATA0,
+ W12_3430_USB1HS_PHY_DATA1,
+ W11_3430_USB1HS_PHY_DATA2,
+ Y11_3430_USB1HS_PHY_DATA3,
+ W9_3430_USB1HS_PHY_DATA4,
+ Y12_3430_USB1HS_PHY_DATA5,
+ W8_3430_USB1HS_PHY_DATA6,
+ Y13_3430_USB1HS_PHY_DATA7,
+
+ /* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
+ AA8_3430_USB2HS_PHY_CLK,
+ AA10_3430_USB2HS_PHY_STP,
+ AA9_3430_USB2HS_PHY_DIR,
+ AB11_3430_USB2HS_PHY_NXT,
+ AB10_3430_USB2HS_PHY_DATA0,
+ AB9_3430_USB2HS_PHY_DATA1,
+ W3_3430_USB2HS_PHY_DATA2,
+ T4_3430_USB2HS_PHY_DATA3,
+ T3_3430_USB2HS_PHY_DATA4,
+ R3_3430_USB2HS_PHY_DATA5,
+ R4_3430_USB2HS_PHY_DATA6,
+ T2_3430_USB2HS_PHY_DATA7,
+
+
+ /* TLL - HSUSB: 12-pin TLL Port 1*/
+ Y8_3430_USB1HS_TLL_CLK,
+ Y9_3430_USB1HS_TLL_STP,
+ AA14_3430_USB1HS_TLL_DIR,
+ AA11_3430_USB1HS_TLL_NXT,
+ W13_3430_USB1HS_TLL_DATA0,
+ W12_3430_USB1HS_TLL_DATA1,
+ W11_3430_USB1HS_TLL_DATA2,
+ Y11_3430_USB1HS_TLL_DATA3,
+ W9_3430_USB1HS_TLL_DATA4,
+ Y12_3430_USB1HS_TLL_DATA5,
+ W8_3430_USB1HS_TLL_DATA6,
+ Y13_3430_USB1HS_TLL_DATA7,
+
+ /* TLL - HSUSB: 12-pin TLL Port 2*/
+ AA8_3430_USB2HS_TLL_CLK,
+ AA10_3430_USB2HS_TLL_STP,
+ AA9_3430_USB2HS_TLL_DIR,
+ AB11_3430_USB2HS_TLL_NXT,
+ AB10_3430_USB2HS_TLL_DATA0,
+ AB9_3430_USB2HS_TLL_DATA1,
+ W3_3430_USB2HS_TLL_DATA2,
+ T4_3430_USB2HS_TLL_DATA3,
+ T3_3430_USB2HS_TLL_DATA4,
+ R3_3430_USB2HS_TLL_DATA5,
+ R4_3430_USB2HS_TLL_DATA6,
+ T2_3430_USB2HS_TLL_DATA7,
+
+ /* TLL - HSUSB: 12-pin TLL Port 3*/
+ AA6_3430_USB3HS_TLL_CLK,
+ AB3_3430_USB3HS_TLL_STP,
+ AA3_3430_USB3HS_TLL_DIR,
+ Y3_3430_USB3HS_TLL_NXT,
+ AA5_3430_USB3HS_TLL_DATA0,
+ Y4_3430_USB3HS_TLL_DATA1,
+ Y5_3430_USB3HS_TLL_DATA2,
+ W5_3430_USB3HS_TLL_DATA3,
+ AB12_3430_USB3HS_TLL_DATA4,
+ AB13_3430_USB3HS_TLL_DATA5,
+ AA13_3430_USB3HS_TLL_DATA6,
+ AA12_3430_USB3HS_TLL_DATA7
+
};
struct omap_mux_cfg {
-
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