Re: [PATCH v2 01/24] mlx4-ib: Use coherent memory for priv pages

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----- Original Message -----
> From: "Sagi Grimberg" <sagigrim@xxxxxxxxx>
> To: "Yishai Hadas" <yishaih@xxxxxxxxxxxxxxxxxx>, "Chuck Lever" <chuck.lever@xxxxxxxxxx>
> Cc: leon@xxxxxxxxxx, "Or Gerlitz" <gerlitz.or@xxxxxxxxx>, "Yishai Hadas" <yishaih@xxxxxxxxxxxx>, "linux-rdma"
> <linux-rdma@xxxxxxxxxxxxxxx>, "Linux NFS Mailing List" <linux-nfs@xxxxxxxxxxxxxxx>, "Majd Dibbiny"
> <majd@xxxxxxxxxxxx>
> Sent: Tuesday, June 21, 2016 9:56:44 AM
> Subject: Re: [PATCH v2 01/24] mlx4-ib: Use coherent memory for priv pages
> 
> 
> > Just found the root cause of the problem, it was found to be a hardware
> > limitation that is described as part of the PRM. The driver code had to
> > be written accordingly, confirmed that internally with the relevant people.
> >
> >  From PRM:
> > "The PBL should be physically contiguous, must reside in a
> > 64-byte-aligned address, and must not include the last 8 bytes of a page."
> >
> > The last sentence pointed that only one page can be used as the last 8
> > bytes should not be included. That's why there is a hard limit in the
> > code for 511 entries.
> >
> > Re the candidate fix that you sent, from initial review it makes sense,
> > we'll formally confirm it soon after finalizing the regression testing
> > in our side.
> >
> > Thanks Chuck and Sagi for evaluating and working on a solution.
> 
> Thanks Yishai,
> 
> That clears up the root-cause.
> 
> Does the same holds for mlx5? or we can leave it alone?
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> 

Also wondering about mlx5 because the default is coherent and increasing the allowed queue depth got me into the swiotlb error situation.
Backing the queue depth down per Bart's suggestion to 32 avoids the swiotlb errors.
Likley 128 is too high anyway, but the weird part of my testing as already mentioned was that its only seen during reconnect activity.

Thanks
Laurence
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