Re: [PATCH net-next v2] page_pool: fix build on powerpc with GCC 14

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Le 14/09/2024 à 04:02, Michael Ellerman a écrit :
Mina Almasry <almasrymina@xxxxxxxxxx> writes:
Building net-next with powerpc with GCC 14 compiler results in this
build error:

/home/sfr/next/tmp/ccuSzwiR.s: Assembler messages:
/home/sfr/next/tmp/ccuSzwiR.s:2579: Error: operand out of domain (39 is
not a multiple of 4)
make[5]: *** [/home/sfr/next/next/scripts/Makefile.build:229:
net/core/page_pool.o] Error 1

Root caused in this thread:
https://lore.kernel.org/netdev/913e2fbd-d318-4c9b-aed2-4d333a1d5cf0@xxxxxxxxxxxxxxxxxx/

Sorry I'm late to this, the original report wasn't Cc'ed to linuxppc-dev :D

I think this is a bug in the arch/powerpc inline asm constraints.

Can you try the patch below, it fixes the build error for me.

I'll run it through some boot tests and turn it into a proper patch over
the weekend.

cheers


diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
index 5bf6a4d49268..0e41c1da82dd 100644
--- a/arch/powerpc/include/asm/atomic.h
+++ b/arch/powerpc/include/asm/atomic.h
@@ -23,6 +23,12 @@
  #define __atomic_release_fence()					\
  	__asm__ __volatile__(PPC_RELEASE_BARRIER "" : : : "memory")
+#ifdef CONFIG_CC_IS_CLANG
+#define DS_FORM_CONSTRAINT "Z<>"
+#else
+#define DS_FORM_CONSTRAINT "YZ<>"
+#endif

I see we have the same in uaccess.h, added by commit 2d43cc701b96 ("powerpc/uaccess: Fix build errors seen with GCC 13/14")

Should that go in a common header, maybe ppc_asm.h ?

+
  static __inline__ int arch_atomic_read(const atomic_t *v)
  {
  	int t;
@@ -197,7 +203,7 @@ static __inline__ s64 arch_atomic64_read(const atomic64_t *v)
  	if (IS_ENABLED(CONFIG_PPC_KERNEL_PREFIXED))
  		__asm__ __volatile__("ld %0,0(%1)" : "=r"(t) : "b"(&v->counter));
  	else
-		__asm__ __volatile__("ld%U1%X1 %0,%1" : "=r"(t) : "m<>"(v->counter));
+		__asm__ __volatile__("ld%U1%X1 %0,%1" : "=r"(t) : DS_FORM_CONSTRAINT (v->counter));
return t;
  }
@@ -208,7 +214,7 @@ static __inline__ void arch_atomic64_set(atomic64_t *v, s64 i)
  	if (IS_ENABLED(CONFIG_PPC_KERNEL_PREFIXED))
  		__asm__ __volatile__("std %1,0(%2)" : "=m"(v->counter) : "r"(i), "b"(&v->counter));
  	else
-		__asm__ __volatile__("std%U0%X0 %1,%0" : "=m<>"(v->counter) : "r"(i));
+		__asm__ __volatile__("std%U0%X0 %1,%0" : "=" DS_FORM_CONSTRAINT (v->counter) : "r"(i));
  }
#define ATOMIC64_OP(op, asm_op) \





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