Hi, I need to provide a encap/decap layer which encapsulats ethernet packets in a custom FPGA header before putting the packet on the wire and decapsulating the custom FPGA header before handing the packet off to the TCP/IP stack. I would appreciate if someone can point me to earlier work that provided a similar interface. I am working on sytem-of-chip MIPS processor in which the ethernet MAC is put in packet fifo mode to talk to the custom FPGA. Thanks in advance Shanthi kiran - : send the line "unsubscribe linux-net" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
