Re: [PATCH v6 08/18] mtd: rawnand: Use the new ECC engine type enumeration

[Miquel Raynal <miquel.raynal@xxxxxxxxxxx>]

Boris Brezillon <boris.brezillon@xxxxxxxxxxxxx> wrote on Thu, 28 May
2020 16:31:50 +0200:

> On Thu, 28 May 2020 13:31:03 +0200
> Miquel Raynal <miquel.raynal@xxxxxxxxxxx> wrote:
> 
> > Mechanical switch from the legacy "mode" enumeration to the new
> > "engine type" enumeration in drivers and board files.
> > 
> > The device tree parsing is also updated to return the new enumeration
> > from the old strings.
> > 
> > Signed-off-by: Miquel Raynal <miquel.raynal@xxxxxxxxxxx>  
> 
> I didn't check all the changes, but I'm fine with the approach
> 
> Reviewed-by: Boris Brezillon <boris.brezillon@xxxxxxxxxxxxx>
> 
> > diff --git a/include/linux/platform_data/mtd-davinci.h b/include/linux/platform_data/mtd-davinci.h
> > index 3383101c233b..dd474dd44848 100644
> > --- a/include/linux/platform_data/mtd-davinci.h
> > +++ b/include/linux/platform_data/mtd-davinci.h
> > @@ -60,16 +60,16 @@ struct davinci_nand_pdata {		/* platform_data */
> >  	struct mtd_partition	*parts;
> >  	unsigned		nr_parts;
> >  
> > -	/* none  == NAND_ECC_NONE (strongly *not* advised!!)
> > -	 * soft  == NAND_ECC_SOFT
> > -	 * else  == NAND_ECC_HW, according to ecc_bits
> > +	/* none  == NAND_ECC_ENGINE_TYPE_NONE (strongly *not* advised!!)
> > +	 * soft  == NAND_ECC_ENGINE_TYPE_SOFT
> > +	 * else  == NAND_ECC_ENGINE_TYPE_ON_HOST, according to ecc_bits
> >  	 *
> >  	 * All DaVinci-family chips support 1-bit hardware ECC.
> >  	 * Newer ones also support 4-bit ECC, but are awkward
> >  	 * using it with large page chips.
> >  	 */
> > -	enum nand_ecc_mode	ecc_mode;
> > -	enum nand_ecc_placement	ecc_placement;
> > +	enum nand_ecc_engine_type engine_type;
> > +	enum nand_ecc_placement ecc_placement;  
> 
> Nitpick: if you want to use a space instead of tab, it should be done in
> patch 3.

Right, fixed!

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