Re: [PATCH] mtd: rawnand: denali: deassert write protect pin

[Miquel Raynal <miquel.raynal@xxxxxxxxxxx>]

On Mon, 2020-01-27 at 12:39:34 UTC, Masahiro Yamada wrote:
> If the write protect signal from this IP is connected to the NAND
> device, this IP can handle the WP# pin via the WRITE_PROTECT
> register.
> 
> The Denali NAND Flash Memory Controller User's Guide describes
> this register like follows:
> 
>   When the controller is in reset, the WP# pin is always asserted
>   to the device. Once the reset is removed, the WP# is de-asserted.
>   The software will then have to come and program this bit to
>   assert/de-assert the same.
> 
>     1 - Write protect de-assert
>     0 - Write protect assert
> 
> The default value is 1, so the write protect is de-asserted after
> the reset is removed. The driver can write to the device unless
> someone has explicitly cleared register before booting the kernel.
> 
> The boot ROM of some UniPhier SoCs (LD4, Pro4, sLD8, Pro5) is the
> case; the boot ROM clears the WRITE_PROTECT register when the system
> is booting from the NAND device, so the NAND device becomes read-only.
> 
> Set it to 1 in the driver in order to allow the write access to the
> device.
> 
> Signed-off-by: Masahiro Yamada <yamada.masahiro@xxxxxxxxxxxxx>

Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next, thanks.

Miquel

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