Hi Masahiro, Masahiro Yamada <masahiroy@xxxxxxxxxx> wrote on Fri, 10 Jan 2020 01:06:20 +0900: > On Fri, Dec 20, 2019 at 6:39 PM Marek Vasut <marex@xxxxxxx> wrote: > > > > The SPARE_AREA_SKIP_BYTES register is reset when the controller reset > > signal is toggled. Yet, this register must be configured to match the > > content of the NAND OOB area. The current default value is always set > > to 8 and is programmed into the hardware in case the hardware was not > > programmed before (e.g. in a bootloader) with a different value. This > > however does not work when the block is reset properly by Linux. > > > > On Altera SoCFPGA CycloneV, ArriaV and Arria10, which are the SoCFPGA > > platforms which support booting from NAND, the SPARE_AREA_SKIP_BYTES > > value must be set to 2. On Socionext Uniphier, the value is 8. This > > patch adds support for preconfiguring the default value and handles > > the special SoCFPGA case by setting the default to 2 on all SoCFPGA > > platforms, while retaining the original behavior and default value of > > 8 on all the other platforms. > > > > Signed-off-by: Marek Vasut <marex@xxxxxxx> > > Cc: Masahiro Yamada <yamada.masahiro@xxxxxxxxxxxxx> > > Cc: Miquel Raynal <miquel.raynal@xxxxxxxxxxx> > > Cc: Richard Weinberger <richard@xxxxxx> > > Cc: Vignesh Raghavendra <vigneshr@xxxxxx> > > To: linux-mtd@xxxxxxxxxxxxxxxxxxx > > Reviewed-by: Tudor Ambarus <tudor.ambarus@xxxxxxxxxxxxx> > > --- > > V2: Move denali->oob_skip_bytes = data->oob_skip_bytes; right after > > of_device_get_match_data() > > > FYI. > > This patch was rebased to avoid a conflict: > http://patchwork.ozlabs.org/patch/1214018/ > > My Ack is in v3. It is indeed about to be applied :) Cheers, Miquèl ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/