Re: [EXT] [PATCH] mtd: spinand: micron: add support for MT29F1G01AAADD

[Miquel Raynal <miquel.raynal@xxxxxxxxxxx>]

Hi Marco,

> > > > 
> > > > I think, this should be NAND_ECCREQ(4, 512).    
> > > 
> > > I don't thinks so, according the datasheet [1], section ECC Protection:
> > > 
> > > 8<--------------------------------------
> > > During a PROGRAM operation, the device calculates an ECC code on the 2k
> > > page in the cache register, before the page is written to the NAND
> > > Flash array. The ECC code is stored in the spare area of the page.
> > > 8<--------------------------------------  
> > 
> > Looking at "Table 11: ECC Protection" it really seems to be 4bit/512. I
> > think the sentence you quoted just means the ECC is calculated for each
> > 512 bytes block in the page and written at once (no subpage write).  
> 
> Yes that part confuses me a bit and than I used the description above..
> I will change that, thanks for the explanation.
> 
> > BTW, there's an easy way to know who's right => nandbiterrs.  
> 
> Thanks for that hint :)
> 
> Regards,
>   Marco

Would you mind sending an updated version of this patch please?

Thanks!
Miquèl

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