Re: flash_lock issue for n25q 128mb spi nor part

[<Tudor.Ambarus@xxxxxxxxxxxxx>]

On 12/3/19 2:05 PM, Tudor.Ambarus@xxxxxxxxxxxxx wrote:
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index f4afe123e9dc..f1490c7b5cb9 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -1033,10 +1033,19 @@ static int spi_nor_write_16bit_sr_and_check(struct spi_nor *nor, u8 sr1)
> 
>         sr_cr[0] = sr1;
> 
> +       dev_err(nor->dev, "before write: sr_cr[0] = %02x, sr_cr[1] = %02x\n",
> +               sr_cr[0], sr_cr[1]);
> +
>         ret = spi_nor_write_sr(nor, sr_cr, 2);
>         if (ret)
>                 return ret;
> 
> +       ret = spi_nor_read_sr(nor, &sr_cr[0]);
> +       if (ret)
> +               return ret;
> +
> +       dev_err(nor->dev, "read back sr1: sr_cr[0] = %02x\n", sr_cr[0]);
> +
>         if (nor->flags & SNOR_F_NO_READ_CR)
>                 return 0;
> 
> @@ -1046,6 +1055,8 @@ static int spi_nor_write_16bit_sr_and_check(struct spi_nor *nor, u8 sr1)
>         if (ret)
>                 return ret;
> 
> +       dev_err(nor->dev, "read back sr2: sr_cr[1] = %02x\n", sr_cr[1]);
> +
>         if (cr_written != sr_cr[1]) {
>                 dev_dbg(nor->dev, "CR: read back test failed\

On n25q256a I obtain:

root@sama5d2-xplained-sd:~# flash_lock -l /dev/mtd1
spi-nor spi1.0: before write: sr_cr[0] = 9e, sr_cr[1] = ff
spi-nor spi1.0: read back sr1: sr_cr[0] = 02
spi-nor spi1.0: read back sr2: sr_cr[1] = ff

the 16 bit write SR does not execute correctly and the WE remains set. If
neither of the micron flashes do not support the 16 bit write SR, we can add a
condition based on MFR. Let me check few datasheets.
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