Hello!
On 27.07.2019 0:08, Roman Yeryomin wrote:
According to datasheets all GD devices are capable of quad mode, which
is enabled via Status Register-2, bit 1 (S9). This corresponds to
Spansion SR/CR operations. Unfortunately only gd25q256 datasheet is
clear about Quad Enable Requirements (QER), others have no such
information in datasheets.
So define quad_enable for all GD devices to be sure.
Also gd25q256 is an exception. There are two versions: C and D.
First one uses S6 bit (like described in e27072851bf7d) but the latter
When citing a commit ID, you need to also specify its summary enclosed in
("").
uses S9 bit like others. To add support for D this should be handled
differently, so, to retain compatibility, leave gd25q256 quad_enable
callback intact.
Signed-off-by: Roman Yeryomin <roman@xxxxxxxx>
[...]
MBR, Sergei
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