Re: nand: Proper definition of "extra" OOB regions? (4x interleaved, then one bulk user)

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Hi

On Fri, Jun 14, 2019 at 3:33 AM Jeff Kletsky <lede@xxxxxxxxxxxx> wrote:
> [...]
> Examining supported chips with similar OOB layouts with multiple
> sections then an "additional" area, such as the GigaDevice GD5FxGQ4xA,
> was not terribly insightful. The GD5F1GQ4UAY datasheet[2] marks the
> upper 64-byte region as "reserved", in contrast to "User meta data"
> and it is not described in the current `gigadevice.c`[3]. As such,
> it isn't convincing evidence that it was omitted as "not required",
> because it was marked "reserved", or perhaps for some other reason.
>
>
> As a side note, the datasheet also marks the first byte of each region
> as "reserved", which is not reflected in the current `gigadevice.c`,
> which includes it in the free region for sections 1-3.
The datasheet I found back then marked the first byte as "reserved for
bad block mark" and the first 4 bytes of other regions are marked as
"user meta data 1". And I wrote the ecc region code accordingly.

I've put the one I found in the attachment.

Regards,
Chuanhong Guo

Attachment: GD5F1GQ4UAYIG.pdf
Description: Adobe PDF document

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