Hi Sascha, Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> wrote on Wed, 24 Apr 2019 09:09:40 +0200: > Hi Miquel, > > Thanks for the review. I fixed all of it. > > On Wed, Apr 17, 2019 at 12:33:55PM +0200, Miquel Raynal wrote: > > Hi Sascha, > > > > > + case NAND_OP_DATA_IN_INSTR: > > > + if (!instr->ctx.data.len) > > > + break; > > > + buf_read = instr->ctx.data.buf.in; > > > + buf_len = instr->ctx.data.len; > > > + nbufs++; > > > + > > > + desc = gpmi_chain_data_read(this, buf_read, buf_len, > > > + &direct); > > > + break; > > > + } > > > > So there is no limitation for the controller in terms of > > address/data cycles that can be asserted in one go? > > No I think not, at least not a practical one. I can't find anything > about it in the reference manual. > > Where is your question aiming at? I'm fine with your answer, it was just to be sure that the controller's limitations (if any) where described. Thanks for your work, Miquèl ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/