Re: VIRTIO iface in mtd

[Boris Brezillon <bbrezillon@xxxxxxxxxx>]

On Fri, 18 Jan 2019 21:03:17 +0100
Marcin Krzemiński <mar.krzeminski@xxxxxxxxx> wrote:

> >  
> >> My understanding is that this driver will use VIRTIO to communicate
> >> with Qemu. From Qemu side at the end there will be a file that will
> >> simulate NAND/NOR. Is it correct?  
> > That's my understanding, but I'm not really a virtio or qemu expert so
> > I might be wrong.
> >  
> >> What use cases do you have in mind for this?  
> > I have one in mind: simulate NAND (in particular MLC NAND) behavior in
> > a pseudo-realistic way to validate UBI/UBIFS code (or any other
> > FS/wear-leveling/FTL code) we might want to use on top of such devices  
> In this place my question is what we remove from emulation?
> I understand that communication layer is removed, however communication 
> protocol
> need t o stay? Eg. because NAND and OOB.

If by protocol you mean the fact that a NAND has an out-of-band and an
in-band area, then yes, we want to emulate that. What I meant by
"protocol" was the how you interact with a parallel or SPI NAND ("send
this opcode to do this or that"), and we definitely don't want to
emulate that part.

> 
> >
> > I'd also like to replace nandsim by this emulation approach. Indeed,
> > nandsim is emulating the parallel NAND protocol more than anything
> > else, which we don't really care about unless we need to test the raw
> > NAND framework (and I think there are better solutions to do that). On
> > the other hand, because nandsim tries to use the full raw NAND stack,
> > it's often hard to emulate real devices (ID-based detection does not
> > work for ONFI/JEDEC compatible devices). All of this makes nandsim a
> > poor choice when the user wants to emulate a NAND device to do
> > post-mortem analysis using a NAND dump.  
> This I need to understand better. If we eg. have NAND dump, do we care 
> with OOB or ECC,
> or not?

Yes we should. For the ECC part, it will be hard to emulate HW ECC
engine, but we can at least specify the layout in use on the board
(which OOB portions are used to store ECC bytes and which ones are
containing user data or bad block markers).

> 
> At the end I also need to add, that I understand NOR devices, but 
> unfortunately
> I have low experience with NANDs. This could lead to some misunderstands :(

We can help with that.

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