Re: [LINUX PATCH v12 3/3] mtd: rawnand: arasan: Add support for Arasan NAND Flash Controller

[Miquel Raynal <miquel.raynal@xxxxxxxxxxx>]

Hi Naga,

[...]

> Inserted biterror @ 48/7
> Successfully corrected 25 bit errors per subpage
> Inserted biterror @ 50/7
> ECC failure, invalid data despite read success
> root@xilinx-zc1751-dc2-2018_1:~#
> 
> But even in this case also, driver is saying ECC failure but read success.
> That means controller is able to detect errors on read page up to 24 bit only.
> After that there is no way to say to the upper layers that the page is bad because of the limitation in the controller.

This is more than a "limitation", the design is broken. I am not sure
how to support such controller, and I am not sure if we even want to.

> Could you please suggest any alternative to report the errors in that case?

Shall we support the controller without the hw ECC engine? Boris, any
thoughts?


Thanks,
Miquèl

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