[PATCH v4 12/14] arm64: dts: marvell: add AP806 SEI subnode

[miquel.raynal@xxxxxxxxxxx (Miquel Raynal)]

Hi Rob,

Rob Herring <robh at kernel.org> wrote on Mon, 16 Jul 2018 09:31:58 -0600:

> On Thu, Jul 05, 2018 at 02:40:09PM +0200, Miquel Raynal wrote:
> > Add the System Error Interrupt node, representing an IRQ chip which is
> > part of the GIC. The SEI node has two subnodes, one for each interrupt
> > domain: wired (from the AP) and not-wired (MSIs from the CPs).  
> 
> Where are the 2 sub-nodes?

Indeed I did not update the commit log.

[...]

> > +			sei: interrupt-controller at 3f0200 {
> > +				compatible = "marvell,armada-8k-sei";
> > +				reg = <0x3f0200 0x40>;
> > +				interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
> > +				marvell,sei-ap-ranges = <0 21>;
> > +				marvell,sei-cp-ranges = <21 43>;

After more discussion, these ranges seems to be only related to the
IP internal organization itself and should not appear in the device
tree at all. Instead, I could probably have a more meaningful
compatible string, like "marvell,ap806-sei". Next time an AP has a
different internal distribution, we'll just add a different compatible
and handle the differences in the driver directly.

This does not have a big impact on the rest of the driver, I should
probably let Marc review this version first.

Thanks,
Miqu?l