On Tue, 6 Feb 2024 at 07:43, Fred Ai(WH) <fred.ai@xxxxxxxxxxxxxx> wrote: > > Hi Uffe > I fixed this issue was based on below commit history. > > commit 4be33cf187036744b4ed84824e7157cfc09c6f4c (HEAD) > Author: Fred Ai <fred.ai@xxxxxxxxxxxxxx> > Date: Mon Dec 20 20:09:40 2021 -0800 > > mmc: sdhci-pci-o2micro: Improve card input timing at SDR104/HS200 mode > > Card input timing is margin, need to adjust the hold timing of card input. > > Signed-off-by: Fred Ai <fred.ai@xxxxxxxxxxxxxx> > Link: https://lore.kernel.org/r/20211221040940.484-1-fred.ai@xxxxxxxxxxxxxx > Signed-off-by: Ulf Hansson <ulf.hansson@xxxxxxxxxx> > > Best regards > Fred Thanks Fred, Patch applied for fixes with a fixes-tag according to the above and by adding a stable tag, thanks! Kind regards Uffe > > -----邮件原件----- > 发件人: Ulf Hansson <ulf.hansson@xxxxxxxxxx> > 发送时间: 2024年2月5日 23:28 > 收件人: fredaibayhubtech@xxxxxxx > 抄送: adrian.hunter@xxxxxxxxx; linux-mmc@xxxxxxxxxxxxxxx; linux.kernel@xxxxxxxxxxxxxxx; Shaper Liu (WH) <shaper.liu@xxxxxxxxxxxxxx>; Chevron Li (WH) <chevron.li@xxxxxxxxxxxxxx>; XiaoGuang Yu (WH) <xiaoguang.yu@xxxxxxxxxxxxxx>; Fred Ai(WH) <fred.ai@xxxxxxxxxxxxxx> > 主题: Re: [PATCH V1 1/1] mmc: sdhci-pci-o2micro: Fix a warm reboot issue that disk can't be detected by BIOS > > On Sat, 3 Feb 2024 at 11:29, <fredaibayhubtech@xxxxxxx> wrote: > > > > From: Fred Ai <fred.ai@xxxxxxxxxxxxxx> > > > > Driver shall switch clock source from DLL clock to OPE clock when > > power off card to ensure that card can be identified with OPE clock by > > BIOS. > > > > Signed-off-by: Fred Ai <fred.ai@xxxxxxxxxxxxxx> > > I assume we want a stable tag to be added to this, but perhaps we can also add a fixes tag? In that case, what is the commit this is fixing? > > Kind regards > Uffe > > > --- > > Change in V1: > > Implement the "set_power" callback in sdhci_ops, then switch PCR > > register 0x354 clock source back to OPE clock when power off card. > > --- > > drivers/mmc/host/sdhci-pci-o2micro.c | 30 > > ++++++++++++++++++++++++++++ > > 1 file changed, 30 insertions(+) > > > > diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c > > b/drivers/mmc/host/sdhci-pci-o2micro.c > > index 7bfee28116af..d4a02184784a 100644 > > --- a/drivers/mmc/host/sdhci-pci-o2micro.c > > +++ b/drivers/mmc/host/sdhci-pci-o2micro.c > > @@ -693,6 +693,35 @@ static int sdhci_pci_o2_init_sd_express(struct mmc_host *mmc, struct mmc_ios *io > > return 0; > > } > > > > +static void sdhci_pci_o2_set_power(struct sdhci_host *host, unsigned > > +char mode, unsigned short vdd) { > > + struct sdhci_pci_chip *chip; > > + struct sdhci_pci_slot *slot = sdhci_priv(host); > > + u32 scratch_32 = 0; > > + u8 scratch_8 = 0; > > + > > + chip = slot->chip; > > + > > + if (mode == MMC_POWER_OFF) { > > + /* UnLock WP */ > > + pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8); > > + scratch_8 &= 0x7f; > > + pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, > > + scratch_8); > > + > > + /* Set PCR 0x354[16] to switch Clock Source back to OPE Clock */ > > + pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32); > > + scratch_32 &= ~(O2_SD_SEL_DLL); > > + pci_write_config_dword(chip->pdev, > > + O2_SD_OUTPUT_CLK_SOURCE_SWITCH, scratch_32); > > + > > + /* Lock WP */ > > + pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8); > > + scratch_8 |= 0x80; > > + pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8); > > + } > > + > > + sdhci_set_power(host, mode, vdd); } > > + > > static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot) { > > struct sdhci_pci_chip *chip; > > @@ -1051,6 +1080,7 @@ static const struct sdhci_ops sdhci_pci_o2_ops = { > > .set_bus_width = sdhci_set_bus_width, > > .reset = sdhci_reset, > > .set_uhs_signaling = sdhci_set_uhs_signaling, > > + .set_power = sdhci_pci_o2_set_power, > > }; > > > > const struct sdhci_pci_fixes sdhci_o2 = { > > > > base-commit: 56897d51886fa7e9f034ff26128eb09f1b811594 > > -- > > 2.25.1 > >
