Re: [PATCH V1 1/1] mmc: sdhci-pci-o2micro: Fix a warm reboot issue that disk can't be detected by BIOS

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On Sat, 3 Feb 2024 at 11:29, <fredaibayhubtech@xxxxxxx> wrote:
>
> From: Fred Ai <fred.ai@xxxxxxxxxxxxxx>
>
> Driver shall switch clock source from DLL clock to
> OPE clock when power off card to ensure that card
> can be identified with OPE clock by BIOS.
>
> Signed-off-by: Fred Ai <fred.ai@xxxxxxxxxxxxxx>

I assume we want a stable tag to be added to this, but perhaps we can
also add a fixes tag? In that case, what is the commit this is fixing?

Kind regards
Uffe

> ---
> Change in V1:
> Implement the "set_power" callback in sdhci_ops,
> then switch PCR register 0x354 clock source back to
> OPE clock when power off card.
> ---
>  drivers/mmc/host/sdhci-pci-o2micro.c | 30 ++++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c b/drivers/mmc/host/sdhci-pci-o2micro.c
> index 7bfee28116af..d4a02184784a 100644
> --- a/drivers/mmc/host/sdhci-pci-o2micro.c
> +++ b/drivers/mmc/host/sdhci-pci-o2micro.c
> @@ -693,6 +693,35 @@ static int sdhci_pci_o2_init_sd_express(struct mmc_host *mmc, struct mmc_ios *io
>         return 0;
>  }
>
> +static void sdhci_pci_o2_set_power(struct sdhci_host *host, unsigned char mode,  unsigned short vdd)
> +{
> +       struct sdhci_pci_chip *chip;
> +       struct sdhci_pci_slot *slot = sdhci_priv(host);
> +       u32 scratch_32 = 0;
> +       u8 scratch_8 = 0;
> +
> +       chip = slot->chip;
> +
> +       if (mode == MMC_POWER_OFF) {
> +               /* UnLock WP */
> +               pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
> +               scratch_8 &= 0x7f;
> +               pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
> +
> +               /* Set PCR 0x354[16] to switch Clock Source back to OPE Clock */
> +               pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32);
> +               scratch_32 &= ~(O2_SD_SEL_DLL);
> +               pci_write_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, scratch_32);
> +
> +               /* Lock WP */
> +               pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
> +               scratch_8 |= 0x80;
> +               pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
> +       }
> +
> +       sdhci_set_power(host, mode, vdd);
> +}
> +
>  static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot)
>  {
>         struct sdhci_pci_chip *chip;
> @@ -1051,6 +1080,7 @@ static const struct sdhci_ops sdhci_pci_o2_ops = {
>         .set_bus_width = sdhci_set_bus_width,
>         .reset = sdhci_reset,
>         .set_uhs_signaling = sdhci_set_uhs_signaling,
> +       .set_power = sdhci_pci_o2_set_power,
>  };
>
>  const struct sdhci_pci_fixes sdhci_o2 = {
>
> base-commit: 56897d51886fa7e9f034ff26128eb09f1b811594
> --
> 2.25.1
>




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