On 27/03/2023 11:58, Potthuri, Sai Krishna wrote: > Hi Krzysztof, > >> -----Original Message----- >> From: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> >> Sent: Friday, March 24, 2023 5:14 PM >> To: Potthuri, Sai Krishna <sai.krishna.potthuri@xxxxxxx>; Ulf Hansson >> <ulf.hansson@xxxxxxxxxx>; Rob Herring <robh+dt@xxxxxxxxxx>; Krzysztof >> Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx>; Michal Simek >> <michal.simek@xxxxxxxxxx>; Adrian Hunter <adrian.hunter@xxxxxxxxx> >> Cc: linux-mmc@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; >> devicetree@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; git (AMD- >> Xilinx) <git@xxxxxxx>; saikrishna12468@xxxxxxxxx >> Subject: Re: [PATCH 1/2] dt-bindings: mmc: arasan,sdci: Add Xilinx Versal Net >> compatible >> >> On 24/03/2023 08:36, Sai Krishna Potthuri wrote: >>> Add Xilinx Versal Net compatible to support eMMC 5.1 PHY. >>> >>> Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@xxxxxxx> >>> --- >>> Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml | 6 ++++++ >>> 1 file changed, 6 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml >>> b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml >>> index 8296c34cfa00..cf44a4b988a7 100644 >>> --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml >>> +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml >>> @@ -27,6 +27,7 @@ allOf: >>> enum: >>> - xlnx,zynqmp-8.9a >>> - xlnx,versal-8.9a >>> + - xlnx,versal-net-5.1-emmc >> >> v5.1 is eMMC standard or Versal block version? If the first, it's not suitable for >> compatibles. >> >> Also, what's the difference from xlnx,versal-8.9a? > V5.1 is an eMMC standard and this compatible is defined based on sdhci arasan > eMMC5.1 Host Controller(arasan,sdhci-5.1), where as in Versal, it’s a different > controller and it is based on 4.51 Host Controller(arasan,sdhci-8.9a). Mixing IP block versions and eMMC spec versions in one binding is a great way to confuse. > Versal Net Compatible is defined it this way to make it inline with the other > existing SoC compatibles like "intel,keembay-sdhci-5.1-emmc". > Please suggest if the compatible need to be renamed to "xlnx,versal-net-emmc"? Is Versal Net uniquely identifying your SoC or IP block? > > Regards > Sai Krishna > >> >>> then: >>> properties: >>> clock-output-names: >>> @@ -62,6 +63,11 @@ properties: >>> description: >>> For this device it is strongly suggested to include >>> clock-output-names and '#clock-cells'. >>> + - items: >>> + - const: xlnx,versal-net-5.1-emmc # Versal Net eMMC PHY You do not have items here, so move it to respective place at beginning, just like others are defined. Best regards, Krzysztof
