On 19/10/22 14:06, Victor Shih wrote:
> This is a sdhci version of mmc's uhs2_set_reg operation.
> UHS-II interface (related registers) will be initialised here.
>
> Signed-off-by: Ben Chuang <ben.chuang@xxxxxxxxxxxxxxxxxxx>
> Signed-off-by: AKASHI Takahiro <takahiro.akashi@xxxxxxxxxx>
> Signed-off-by: Victor Shih <victor.shih@xxxxxxxxxxxxxxxxxxx>
> ---
> drivers/mmc/host/sdhci-uhs2.c | 103 ++++++++++++++++++++++++++++++++++
> drivers/mmc/host/sdhci.c | 12 ++++
> drivers/mmc/host/sdhci.h | 1 +
> 3 files changed, 116 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-uhs2.c b/drivers/mmc/host/sdhci-uhs2.c
> index afaca5d96938..c9d59b8ac37f 100644
> --- a/drivers/mmc/host/sdhci-uhs2.c
> +++ b/drivers/mmc/host/sdhci-uhs2.c
> @@ -350,6 +350,53 @@ static void __sdhci_uhs2_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
> spin_unlock_irqrestore(&host->lock, flags);
> }
>
> +static void sdhci_uhs2_set_config(struct sdhci_host *host)
> +{
> + u32 value;
> + u16 sdhci_uhs2_set_ptr = sdhci_readw(host, SDHCI_UHS2_SET_PTR);
> + u16 sdhci_uhs2_gen_set_reg = (sdhci_uhs2_set_ptr + 0);
> + u16 sdhci_uhs2_phy_set_reg = (sdhci_uhs2_set_ptr + 4);
> + u16 sdhci_uhs2_tran_set_reg = (sdhci_uhs2_set_ptr + 8);
> + u16 sdhci_uhs2_tran_set_1_reg = (sdhci_uhs2_set_ptr + 12);
> +
> + /* Set Gen Settings */
> + sdhci_writel(host, host->mmc->uhs2_caps.n_lanes_set <<
> + SDHCI_UHS2_GEN_SET_N_LANES_POS, sdhci_uhs2_gen_set_reg);
> +
> + /* Set PHY Settings */
> + value = (host->mmc->uhs2_caps.n_lss_dir_set <<
> + SDHCI_UHS2_PHY_SET_N_LSS_DIR_POS) |
> + (host->mmc->uhs2_caps.n_lss_sync_set <<
> + SDHCI_UHS2_PHY_SET_N_LSS_SYN_POS);
> + if (host->mmc->flags & MMC_UHS2_SPEED_B)
> + value |= 1 << SDHCI_UHS2_PHY_SET_SPEED_POS;
> + sdhci_writel(host, value, sdhci_uhs2_phy_set_reg);
> +
> + /* Set LINK-TRAN Settings */
> + value = (host->mmc->uhs2_caps.max_retry_set <<
> + SDHCI_UHS2_TRAN_SET_RETRY_CNT_POS) |
> + (host->mmc->uhs2_caps.n_fcu_set <<
> + SDHCI_UHS2_TRAN_SET_N_FCU_POS);
> + sdhci_writel(host, value, sdhci_uhs2_tran_set_reg);
> + sdhci_writel(host, host->mmc->uhs2_caps.n_data_gap_set,
> + sdhci_uhs2_tran_set_1_reg);
> +}
> +
> +static int sdhci_uhs2_check_dormant(struct sdhci_host *host)
> +{
> + u32 val;
> + /* 100ms */
> + int timeout = 100000;
> +
> + if (read_poll_timeout_atomic(sdhci_readl, val, (val & SDHCI_UHS2_IN_DORMANT_STATE),
> + 100, timeout, true, host, SDHCI_PRESENT_STATE)) {
> + pr_warn("%s: UHS2 IN_DORMANT fail in 100ms.\n", mmc_hostname(host->mmc));
> + sdhci_dumpregs(host);
> + return -EIO;
> + }
> + return 0;
> +}
> +
> /*****************************************************************************\
> * *
> * MMC callbacks *
> @@ -435,6 +482,61 @@ static int sdhci_uhs2_enable_clk(struct mmc_host *mmc)
> return 0;
> }
>
> +static int sdhci_uhs2_do_detect_init(struct mmc_host *mmc);
> +
> +static int sdhci_uhs2_control(struct mmc_host *mmc, enum sd_uhs2_operation op)
> +{
> + struct sdhci_host *host = mmc_priv(mmc);
> + unsigned long flags;
> + int err = 0;
> + u16 sdhci_uhs2_set_ptr = sdhci_readw(host, SDHCI_UHS2_SET_PTR);
> + u16 sdhci_uhs2_phy_set_reg = (sdhci_uhs2_set_ptr + 4);
> +
> + DBG("Begin %s, act %d.\n", __func__, op);
DBG already has __func__. Please also check other DBG that
have duplicate __func__
> +
> + spin_lock_irqsave(&host->lock, flags);
This all relates to initialization or reinitialization, so I suspect
the spinlock is not needed here. What could it be racing with?
> +
> + switch (op) {
> + case UHS2_PHY_INIT:
> + err = sdhci_uhs2_do_detect_init(mmc);
> + break;
> + case UHS2_SET_CONFIG:
> + sdhci_uhs2_set_config(host);
> + break;
> + case UHS2_ENABLE_INT:
> + sdhci_clear_set_irqs(host, 0, SDHCI_INT_CARD_INT);
> + break;
> + case UHS2_DISABLE_INT:
> + sdhci_clear_set_irqs(host, SDHCI_INT_CARD_INT, 0);
> + break;
> + case UHS2_SET_SPEED_B:
> + sdhci_writeb(host, 1 << SDHCI_UHS2_PHY_SET_SPEED_POS,
> + sdhci_uhs2_phy_set_reg);
> + break;
> + case UHS2_CHECK_DORMANT:
> + err = sdhci_uhs2_check_dormant(host);
> + break;
> + case UHS2_DISABLE_CLK:
> + err = sdhci_uhs2_disable_clk(mmc);
> + break;
> + case UHS2_ENABLE_CLK:
> + err = sdhci_uhs2_enable_clk(mmc);
> + break;
> + case UHS2_POST_ATTACH_SD:
> + host->ops->uhs2_post_attach_sd(host);
> + break;
> + default:
> + pr_err("%s: input sd uhs2 operation %d is wrong!\n",
> + mmc_hostname(host->mmc), op);
> + err = -EIO;
> + break;
> + }
> +
> + spin_unlock_irqrestore(&host->lock, flags);
> +
> + return err;
> +}
> +
> /*****************************************************************************\
> * *
> * Driver init/exit *
> @@ -589,6 +691,7 @@ static int sdhci_uhs2_host_ops_init(struct sdhci_host *host)
> host->mmc_host_ops.start_signal_voltage_switch =
> sdhci_uhs2_start_signal_voltage_switch;
> host->mmc_host_ops.uhs2_set_ios = sdhci_uhs2_set_ios;
> + host->mmc_host_ops.uhs2_control = sdhci_uhs2_control;
>
> if (!host->mmc_host_ops.uhs2_detect_init)
> host->mmc_host_ops.uhs2_detect_init = sdhci_uhs2_do_detect_init;
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index de47c71995fb..b9db2e976010 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -236,6 +236,18 @@ void sdhci_reset(struct sdhci_host *host, u8 mask)
> }
> EXPORT_SYMBOL_GPL(sdhci_reset);
>
> +void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set)
> +{
> + u32 ier;
> +
> + ier = sdhci_readl(host, SDHCI_INT_ENABLE);
> + ier &= ~clear;
> + ier |= set;
> + sdhci_writel(host, ier, SDHCI_INT_ENABLE);
> + sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE);
> +}
> +EXPORT_SYMBOL_GPL(sdhci_clear_set_irqs);
This might as well be in sdhci-uhs2.c since that is the only
place that calls it. Then there is no need to export it.
> +
> static bool sdhci_do_reset(struct sdhci_host *host, u8 mask)
> {
> if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index 22d7f47862ae..f049331bd0bc 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -869,6 +869,7 @@ void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq);
> int sdhci_request_atomic(struct mmc_host *mmc, struct mmc_request *mrq);
> void sdhci_set_bus_width(struct sdhci_host *host, int width);
> void sdhci_reset(struct sdhci_host *host, u8 mask);
> +void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set);
> void sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned timing);
> int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode);
> void sdhci_enable_preset_value(struct sdhci_host *host, bool enable);
