RE: [PATCH v4] mmc: renesas_sdhi: Fix rounding errors

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Hi kernel test robot,

>; Prabhakar Mahadev Lad
> <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> Subject: Re: [PATCH v4] mmc: renesas_sdhi: Fix rounding errors
> 
> Hi Biju,
> 
> Thank you for the patch! Perhaps something to improve:
> 
> If you fix the issue, kindly add following tag where applicable
> | Reported-by: kernel test robot <lkp@xxxxxxxxx>
> 
> All warnings (new ones prefixed by >>):
> 
> >> drivers/mmc/host/renesas_sdhi_core.c:164:34: warning: variable 'i'
> is
> >> uninitialized when used here [-Wuninitialized]
>            new_upper_limit = (new_clock << i) + ((new_clock << i) >>
> 10);
>                                            ^
>    drivers/mmc/host/renesas_sdhi_core.c:132:7: note: initialize the
> variable 'i' to silence this warning
>            int i;
>                 ^
>                  = 0
>    1 warning generated.
> 
> 
> vim +/i +164 drivers/mmc/host/renesas_sdhi_core.c

I have sent v5. 
https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220928110755.849275-1-biju.das.jz@xxxxxxxxxxxxxx/

Cheers,
Biju


> 
>    123
>    124	static unsigned int renesas_sdhi_clk_update(struct
> tmio_mmc_host *host,
>    125						    unsigned int wanted_clock)
>    126	{
>    127		struct renesas_sdhi *priv = host_to_priv(host);
>    128		struct clk *ref_clk = priv->clk;
>    129		unsigned int freq, diff, best_freq = 0, diff_min =
> ~0;
>    130		unsigned int new_clock, clkh_shift = 0;
>    131		unsigned int new_upper_limit;
>    132		int i;
>    133
>    134		/*
>    135		 * We simply return the current rate if a) we are not
> on a R-Car Gen2+
>    136		 * SoC (may work for others, but untested) or b) if
> the SCC needs its
>    137		 * clock during tuning, so we don't change the
> external clock setup.
>    138		 */
>    139		if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2) ||
> mmc_doing_tune(host->mmc))
>    140			return clk_get_rate(priv->clk);
>    141
>    142		if (priv->clkh) {
>    143			/* HS400 with 4TAP needs different clock
> settings */
>    144			bool use_4tap = priv->quirks && priv->quirks-
> >hs400_4taps;
>    145			bool need_slow_clkh = host->mmc->ios.timing ==
> MMC_TIMING_MMC_HS400;
>    146			clkh_shift = use_4tap && need_slow_clkh ? 1 :
> 2;
>    147			ref_clk = priv->clkh;
>    148		}
>    149
>    150		new_clock = wanted_clock << clkh_shift;
>    151
>    152		/*
>    153		 * We want the bus clock to be as close as possible
> to, but no
>    154		 * greater than, new_clock.  As we can divide by 1 <<
> i for
>    155		 * any i in [0, 9] we want the input clock to be as
> close as
>    156		 * possible, but no greater than, new_clock << i.
>    157		 *
>    158		 * Add an upper limit of 1/1024 rate higher to the
> clock rate to fix
>    159		 * clk rate jumping to lower rate due to rounding
> error (eg: RZ/G2L has
>    160		 * 3 clk sources 533.333333 MHz, 400 MHz and
> 266.666666 MHz. The request
>    161		 * for 533.333333 MHz will selects a slower 400 MHz
> due to rounding
>    162		 * error (533333333 Hz / 4 * 4 = 533333332 Hz <
> 533333333 Hz)).
>    163		 */
>  > 164		new_upper_limit = (new_clock << i) + ((new_clock <<
> i) >> 10);
>    165		for (i = min(9, ilog2(UINT_MAX / new_clock)); i >= 0;
> i--) {
>    166			freq = clk_round_rate(ref_clk, new_clock << i);
>    167			if (freq > new_upper_limit) {
>    168				/* Too fast; look for a slightly slower
> option */
>    169				freq = clk_round_rate(ref_clk, (new_clock
> << i) / 4 * 3);
>    170				if (freq > (new_clock << i))
>    171					continue;
>    172			}
>    173
>    174			diff = new_clock - (freq >> i);
>    175			if (diff <= diff_min) {
>    176				best_freq = freq;
>    177				diff_min = diff;
>    178			}
>    179		}
>    180
>    181		clk_set_rate(ref_clk, best_freq);
>    182
>    183		if (priv->clkh)
>    184			clk_set_rate(priv->clk, best_freq >>
> clkh_shift);
>    185
>    186		return clk_get_rate(priv->clk);
>    187	}
>    188
> 
> --
> 0-DAY CI Kernel Test Service




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