Re: [PATCH V2] mmc: dw_mmc: exynos: fix the finding clock sample value

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> On 22 Oct 2021, at 12:21 pm, Jaehoon Chung <jh80.chung@xxxxxxxxxxx> wrote:
> 
> Even though there are candiates value if can't find best value, it's
> returned -EIO. It's not proper behavior.
> If there is not best value, use a first candiate value to work eMMC.
> 
> Signed-off-by: Jaehoon Chung <jh80.chung@xxxxxxxxxxx>
> Tested-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>

Tested-by: Christian Hewitt <christianshewitt@xxxxxxxxx>

v2 patch working fine with the module that triggered the original report:

[    2.902144] mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 400000Hz, actual 396825HZ div = 63)
[    2.912118] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 400000Hz, actual 396825HZ div = 63)
[    3.142474] mmc_host mmc0: Bus speed (slot 0) = 200000000Hz (slot req 200000000Hz, actual 200000000HZ div = 0)
[    3.239339] mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0)
[    3.241388] mmc_host mmc0: Bus speed (slot 0) = 266666666Hz (slot req 200000000Hz, actual 133333333HZ div = 1)
[    3.243310] mmc0: new HS400 MMC card at address 0001
[    3.259191] mmcblk0: mmc0:0001 8GME4R 7.28 GiB 
[    3.302621]  mmcblk0: p1 p2
[    3.311541] mmcblk0boot0: mmc0:0001 8GME4R 4.00 MiB 
[    3.327737] mmcblk0boot1: mmc0:0001 8GME4R 4.00 MiB 
[    3.340919] mmcblk0rpmb: mmc0:0001 8GME4R 512 KiB, chardev (246:0)

Thanks!

> ---
> Changelog V2:
> - Add Marek's Tested-by tag
> - Remove unnecessary code
> 
> drivers/mmc/host/dw_mmc-exynos.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
> 
> diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c
> index 0c75810812a0..1f8a3c0ddfe1 100644
> --- a/drivers/mmc/host/dw_mmc-exynos.c
> +++ b/drivers/mmc/host/dw_mmc-exynos.c
> @@ -464,6 +464,18 @@ static s8 dw_mci_exynos_get_best_clksmpl(u8 candiates)
> 		}
> 	}
> 
> +	/*
> +	 * If there is no cadiates value, then it needs to return -EIO.
> +	 * If there are candiates values and don't find bset clk sample value,
> +	 * then use a first candiates clock sample value.
> +	 */
> +	for (i = 0; i < iter; i++) {
> +		__c = ror8(candiates, i);
> +		if ((__c & 0x1) == 0x1) {
> +			loc = i;
> +			goto out;
> +		}
> +	}
> out:
> 	return loc;
> }
> @@ -494,6 +506,8 @@ static int dw_mci_exynos_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
> 		priv->tuned_sample = found;
> 	} else {
> 		ret = -EIO;
> +		dev_warn(&mmc->class_dev,
> +			"There is no candiates value about clksmpl!\n");
> 	}
> 
> 	return ret;
> -- 
> 2.29.0
> 





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