On Tue, Dec 29, 2020 at 04:46:02PM +0800, Jisheng Zhang wrote: > Hi, > > Two patch series: > > *emmc inline encryption > Recently Eric sent out emmc inline encryption patches, per my understanding > the emmc inline encryption based on CQ interface:cqhci. > > *ADMA3 support > Baolin send out ADMA3 support patches: https://lkml.org/lkml/2020/4/26/125 > which makes use of the ADMA3 transfer in mmc software queue. > > Per my understanding, ADMA3 is focusing on the host side while the emmc CQ > focuses on emmc card side, they don't conflict with each other. But current > mmc_blk_cqe_issue_rw_rq() goes through either hsq or cqe code path but not both. > > So how can ADMA3 and CQE be used at the same time? > Only the hardware CQE provides inline encryption support. In particular, the hardware interface to program keyslots uses the CQE registers, as does the hardware interface to assign keyslots and DUNs to particular read/write requests. So my understanding is that eMMC inline encryption isn't compatible with eMMC commands being issued in ways other than the hardware CQE, such as via the HSQ (host software queue) feature, or via "packed requests". So those features can't be enabled in combination with inline encryption. - Eric