On Wed, 4 Dec 2019 at 08:20, Chaotian Jing <chaotian.jing@xxxxxxxxxxxx> wrote: > > there is a chance that always get response CRC error after HS200 tuning, > the reason is that need set CMD_TA to 2. this modification is only for > MT8173. > > Signed-off-by: Chaotian Jing <chaotian.jing@xxxxxxxxxxxx> I have applied this for fixes, however it seems like this should also be tagged for stable, right? Is there a specific commit this fixes or should we just find the version it applies to? Kind regards Uffe > --- > drivers/mmc/host/mtk-sd.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c > index 189e42674d85..010fe29a4888 100644 > --- a/drivers/mmc/host/mtk-sd.c > +++ b/drivers/mmc/host/mtk-sd.c > @@ -228,6 +228,7 @@ > #define MSDC_PATCH_BIT_SPCPUSH (0x1 << 29) /* RW */ > #define MSDC_PATCH_BIT_DECRCTMO (0x1 << 30) /* RW */ > > +#define MSDC_PATCH_BIT1_CMDTA (0x7 << 3) /* RW */ > #define MSDC_PATCH_BIT1_STOP_DLY (0xf << 8) /* RW */ > > #define MSDC_PATCH_BIT2_CFGRESP (0x1 << 15) /* RW */ > @@ -1881,6 +1882,7 @@ static int hs400_tune_response(struct mmc_host *mmc, u32 opcode) > > /* select EMMC50 PAD CMD tune */ > sdr_set_bits(host->base + PAD_CMD_TUNE, BIT(0)); > + sdr_set_field(host->base + MSDC_PATCH_BIT1, MSDC_PATCH_BIT1_CMDTA, 2); > > if (mmc->ios.timing == MMC_TIMING_MMC_HS200 || > mmc->ios.timing == MMC_TIMING_UHS_SDR104) > -- > 2.18.0
