On 05 October 2019 at 00:53 am, Russell King - ARM Linux admin wrote:
On Sat, Oct 05, 2019 at 12:45:29AM +0200, Christian Zigotzky wrote:Hello, The onboard SD card of the Cyrus+ PowerPC board (A-EON AmigaOne X5000) [1] doesn't work anymore after the 'mmc-v5.4-2' updates [2].Hi Christian, Please can you help us understand what is going on with your setup. Obviously, your board wants the SDHCI controller to be DMA coherent, but I guess that DT on your platform does not specify the "dma-coherent" property. Can you confirm that? If that's the case, the question is what we do about that - do we add it (and wait for further reports?) The only alternative I can see is that we split ARM usage from PowerPC usage of this driver; it seems PowerPC can get away with being more lenient wrt DT DMA coherency correctness than the ARM architecture. Thanks.
Hi Russell,I didn't find the property "dma-coherent" in the dtb source files (attached).
Output of "fdtdump cyrus_p5020_eth_poweroff.dtb | grep dma":
dma0 = "/soc@ffe000000/dma@100300";
dma1 = "/soc@ffe000000/dma@101300";
dma@100300 {
compatible = "fsl,eloplus-dma";
dma-channel@0 {
compatible = "fsl,eloplus-dma-channel";
dma-channel@80 {
compatible = "fsl,eloplus-dma-channel";
dma-channel@100 {
compatible = "fsl,eloplus-dma-channel";
dma-channel@180 {
compatible = "fsl,eloplus-dma-channel";
dma@101300 {
compatible = "fsl,eloplus-dma";
dma-channel@0 {
compatible = "fsl,eloplus-dma-channel";
dma-channel@80 {
compatible = "fsl,eloplus-dma-channel";
dma-channel@100 {
compatible = "fsl,eloplus-dma-channel";
dma-channel@180 {
compatible = "fsl,eloplus-dma-channel";
Thanks,
Christian
/*
* P5020/P5010 Silicon/SoC Device Tree Source (pre include)
*
* Copyright 2011 - 2015 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of Freescale Semiconductor nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
*
* ALTERNATIVELY, this software may be distributed under the terms of the
* GNU General Public License ("GPL") as published by the Free Software
* Foundation, either version 2 of that License or (at your option) any
* later version.
*
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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*/
/dts-v1/;
/include/ "e5500_power_isa.dtsi"
/ {
compatible = "fsl,P5020";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&mpic>;
aliases {
ccsr = &soc;
dcsr = &dcsr;
serial0 = &serial0;
serial1 = &serial1;
serial2 = &serial2;
serial3 = &serial3;
pci0 = &pci0;
pci1 = &pci1;
pci2 = &pci2;
pci3 = &pci3;
usb0 = &usb0;
usb1 = &usb1;
dma0 = &dma0;
dma1 = &dma1;
sdhc = &sdhc;
msi0 = &msi0;
msi1 = &msi1;
msi2 = &msi2;
crypto = &crypto;
sec_jr0 = &sec_jr0;
sec_jr1 = &sec_jr1;
sec_jr2 = &sec_jr2;
sec_jr3 = &sec_jr3;
rtic_a = &rtic_a;
rtic_b = &rtic_b;
rtic_c = &rtic_c;
rtic_d = &rtic_d;
sec_mon = &sec_mon;
raideng = &raideng;
raideng_jr0 = &raideng_jr0;
raideng_jr1 = &raideng_jr1;
raideng_jr2 = &raideng_jr2;
raideng_jr3 = &raideng_jr3;
fman0 = &fman0;
ethernet0 = &enet3;
ethernet1 = &enet4;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: PowerPC,e5500@0 {
device_type = "cpu";
reg = <0>;
clocks = <&mux0>;
next-level-cache = <&L2_0>;
fsl,portid-mapping = <0x80000000>;
L2_0: l2-cache {
next-level-cache = <&cpc>;
};
};
cpu1: PowerPC,e5500@1 {
device_type = "cpu";
reg = <1>;
clocks = <&mux1>;
next-level-cache = <&L2_1>;
fsl,portid-mapping = <0x40000000>;
L2_1: l2-cache {
next-level-cache = <&cpc>;
};
};
};
};
Attachment:
cyrus_p5020.eth.dts
Description: audio/vnd.dts
