On Tue, 27 Aug 2019 at 05:31, Philip Langdale <philipl@xxxxxxxxx> wrote: > > On Mon, 26 Aug 2019 11:06:26 -0700 > Philip Langdale <philipl@xxxxxxxxx> wrote: > > > > > I started looking at how we might make a general change to ignore for > > all > > cards, and in the process, I saw that we already have a way to > > differentiate > > ocr_avail for different card types, and the sdhci driver uses this to > > elide the low voltage range when dealing with SD cards. So I've made > > the small change to have the rtsx drivers set ocr_avail_sd and skip > > the low voltage > > range support. This makes the cards work, as you'd expect. > > > > There's still a fair claim that the elidation logic should move into > > the core, > > so that all host controllers automatically benefit, but I think I > > should leave > > that to you. It's a core change and I don't pretend to understand all > > the > > considerations for all the various supported controllers. > > > > I've sent a new diff with the rtsx-specific fix. > > > > More reading == more thoughts. > > So, I went through the simplified 6.0 spec more carefully and this is > what I've extracted: > > * Low Voltage Signalling: The 1.8V I/O voltage we already support > * Low Voltage Interface: A new 6.0 feature for setting VDD to 1.8V I have the full specs available, as Linaro is a member of the SD Association. I can't find anything that confirms that "Low Voltage Interface" has anything to do with the supply voltage (VDD). It's all about signaling voltage, unless I am mistaken somehow. All I can find for VDD (or VDD1) is that it always needs to stay between 2.7V - 3.6V. > > The LVI is documented in the "Low Voltage Interface Addendum" that is > not included in the simplified spec. Why? Who knows. Do you have access > to this by any chance? I have the spec. The below is stated in the initial part from the LVI addendum. "There has been a demand of low voltage signaling interface memory card for especially mobile host devices. To meet the demand, this addendum defines low voltage signaling interface in SD mode (called "LVS interface") that starts in 1.8V signaling UHS-I mode without going through 3.3V signaling, that is host can start card communication in SDR12 mode from the start of initialization and skips Voltage Switch Sequence (CMD11). "LVS" denotes Low Voltage Signaling for communication lines but 3.3V power supply is still used." > > There are specific references in the simplified spec when discussing > the OCR that make it pretty clear that bit 7 in the OCR indicates the > card supports LVI and can be initialised in 1.8V mode if the LVI > negotiation is followed. Actually no, I don't think so. Bit7 in OCR is a very old thing and it's about "dual voltage cards" and not LVI. I did some more research to really understand. By searching for "dual voltage" in the spec(s) and bit7 in OCR. I found it being introduced already in version 2.00. Then I realized that the current text in 7.1, is a leftover that should have been removed altogether and not only parts as was done in version 3.01. My guess, is that it was probably introduced while the "eSD" spec was being developed, as an alternative to eMMC. Additionally, reading the LVI addendum and especially the LVI initialization sequence for a LV compatible host+card, I found nothing that mentions bit7 in the OCR register. > > There is also a clear statement that an A2 card must support LVI. > > That means that the Sandisk card I'm looking at is 'correctly' setting > bit 7 in OCR to indicate LVI support. And there's no "LV" logo because > A2 implies LVI. > > It's deeply annoying that Low Voltage initialisation is done > differently for SD vs MMC despite using the same mechanism to indicate > support. > > Overall, this implies that until we can implement LVI negotiation, it > would be semantically correct to ignore bit 7 explicitly for SD cards, > and hopefully we'd eventually be able to implement the negotiation and > support low voltage VDD when the controller and card support it. According to the above, I don't think we ever need to care about bit 7 in the OCR. But yes, supporting LVI may be complicated, but that's another story. :-) Anyway, I decided to post a patch, please test it at your side and see if it fixes the problem for you. Kind regards Uffe
