On Wed, Aug 07, 2019 at 09:10:10PM +0000, Shirley Her (SC) wrote: > Fix data read/write error in HS200 mode due to chip DLL lock phase shift > +static int sdhci_o2_wait_dll_detect_lock(struct sdhci_host *host) > +{ > + ktime_t timeout; > + u32 scratch32; > + > + usleep_range(5000, 6000); > + scratch32 = sdhci_readl(host, O2_PLL_DLL_WDT_CONTROL1); > + if (!(scratch32 & O2_DLL_LOCK_STATUS)) { > + pr_warn("%s: DLL is still unlocked after wait 5ms\n", > + mmc_hostname(host->mmc)); > + } > + > + /* Detect 1 s */ > + timeout = ktime_add_ms(ktime_get(), 1000); > + while (1) { > + bool timedout = ktime_after(ktime_get(), timeout); > + > + scratch32 = sdhci_readl(host, O2_PLL_DLL_WDT_CONTROL1); > + if (!(scratch32 & O2_DLL_LOCK_STATUS)) > + return 0; > + > + if (timedout) > + return 1; > + } > +} It would be better to use readx_poll_timeout instead of open coding the same logic. static u32 sdhci_o2_pll_dll_wdt_control(struct sdhci_host *host) { return sdhci_readl(host, O2_PLL_DLL_WDT_CONTROL1); } static int sdhci_o2_wait_dll_detect_lock(struct sdhci_host *host) { return readx_poll_timeout(sdhci_o2_pll_dll_wdt_control, host, scratch32, !(scratch32 & O2_DLL_LOCK_STATUS), 100, 6000); }