Hi Shawn,
On 12/01/18 12:12 PM, Shawn Lin wrote:
> Add CQHCI initialization and implement CQHCI operations for Arasan
> SDHCI variant host, namely arasan,sdhci-5.1, which is used by Rockchip
> RK3399 platform.
>
> Signed-off-by: Shawn Lin <shawn.lin@xxxxxxxxxxxxxx>
> Acked-by: Adrian Hunter <adrian.hunter@xxxxxxxxx>
> ---
>
> drivers/mmc/host/Kconfig | 1 +
> drivers/mmc/host/sdhci-of-arasan.c | 137 +++++++++++++++++++++++++++++++++++--
> 2 files changed, 131 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
> index 2fda095..45aed90 100644
> --- a/drivers/mmc/host/Kconfig
> +++ b/drivers/mmc/host/Kconfig
> @@ -133,6 +133,7 @@ config MMC_SDHCI_OF_ARASAN
> depends on MMC_SDHCI_PLTFM
> depends on OF
> depends on COMMON_CLK
> + select MMC_CQHCI
> help
> This selects the Arasan Secure Digital Host Controller Interface
> (SDHCI). This hardware is found e.g. in Xilinx' Zynq SoC.
> diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
> index fb57206..e30c84f 100644
> --- a/drivers/mmc/host/sdhci-of-arasan.c
> +++ b/drivers/mmc/host/sdhci-of-arasan.c
> @@ -25,11 +25,13 @@
> #include <linux/of_device.h>
> #include <linux/phy/phy.h>
> #include <linux/regmap.h>
> -#include "sdhci-pltfm.h"
> #include <linux/of.h>
>
> -#define SDHCI_ARASAN_VENDOR_REGISTER 0x78
> +#include "cqhci.h"
> +#include "sdhci-pltfm.h"
>
> +#define SDHCI_ARASAN_VENDOR_REGISTER 0x78
> +#define SDHCI_ARASAN_CQE_BASE_ADDR 0x200
> #define VENDOR_ENHANCED_STROBE BIT(0)
>
> #define PHY_CLK_TOO_SLOW_HZ 400000
> @@ -90,6 +92,7 @@ struct sdhci_arasan_data {
> struct phy *phy;
> bool is_phy_on;
>
> + bool has_cqe;
> struct clk_hw sdcardclk_hw;
> struct clk *sdcardclk;
>
> @@ -290,6 +293,61 @@ static void sdhci_arasan_set_power(struct sdhci_host *host, unsigned char mode,
> SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
> };
>
> +static u32 sdhci_arasan_cqhci_irq(struct sdhci_host *host, u32 intmask)
> +{
> + int cmd_error = 0;
> + int data_error = 0;
> +
> + if (!sdhci_cqe_irq(host, intmask, &cmd_error, &data_error))
> + return intmask;
> +
> + cqhci_irq(host->mmc, intmask, cmd_error, data_error);
> +
> + return 0;
> +}
> +
> +static void sdhci_arasan_dumpregs(struct mmc_host *mmc)
> +{
> + sdhci_dumpregs(mmc_priv(mmc));
> +}
> +
> +static void sdhci_arasan_cqe_enable(struct mmc_host *mmc)
> +{
> + struct sdhci_host *host = mmc_priv(mmc);
> + u32 reg;
> +
> + reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
> + while (reg & SDHCI_DATA_AVAILABLE) {
> + sdhci_readl(host, SDHCI_BUFFER);
> + reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
> + }
Sorry for replying to old thread.
I am also trying to implement command queuing for my driver and was
wondering why you needed to do this. Did you see some issues without
clearing the buffer? Wouldn't an SRD reset have got rid of any residual
data in the buffer? Why is there residual data in the buffer in the
first place?
Thanks,
Faiz
