On 20/06/19 1:22 AM, Angelo Dureghello wrote: > Hi Christoph, > > On Sun, Jun 16, 2019 at 11:58:07PM -0700, Christoph Hellwig wrote: >> On Sun, Jun 16, 2019 at 10:48:21PM +0200, Angelo Dureghello wrote: >>> This driver has been developed as a separate module starting >>> from the similar sdhci-esdhc-fls.c. >>> Separation has been mainly driven from change in endianness. >> >> Can't we have a way to define the endianess at build or even runtime? >> We have plenty of that elsewhere in the kernel. > > well, the base sdhci layer wants to access byte-size fields of the > esdhc controller registers. > But this same Freescale esdhc controller may be found in 2 > flavors, big-endian or little-endian organized. > So in this driver i am actually correcting byte-addresses to > access the wanted byte-field in the big-endian hw controller. > > So this is a bit different from a be-le endian swap of a > long or a short that the kernel is organized to do.. Did you consider just using different sdhci_ops so that you could support different sdhci I/O accessors?
