Re: [PATCH RFT] mmc: renesas_sdhi: limit block count to 16 bit for old revisions

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On Tue, 19 Mar 2019 at 11:13, Wolfram Sang
<wsa+renesas@xxxxxxxxxxxxxxxxxxxx> wrote:
>
> R-Car Gen2 has two different SDHI incarnations in the same chip. The
> older one does not support the recently introduced 32 bit register
> access to the block count register. Make sure we use this feature only
> after the first known version.
>
> Thanks to the Renesas Testing team for this bug report!
>
> Fixes:5603731a15ef ("mmc: tmio: fix access width of Block Count Register")
> Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
> Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>

Applied for fixes and added a stable tag, thanks!

Kind regards
Uffe


> ---
>
> I could reproduce the issue on my Renesas Lager board (R-Car H2) and this patch
> fixes the issue for me. Still, if we could confirmation from the testing team,
> this would be awesome to have before applying, I think.
>
>  drivers/mmc/host/renesas_sdhi_core.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
> index 71e13844df6c..8742e27e4e8b 100644
> --- a/drivers/mmc/host/renesas_sdhi_core.c
> +++ b/drivers/mmc/host/renesas_sdhi_core.c
> @@ -641,6 +641,7 @@ int renesas_sdhi_probe(struct platform_device *pdev,
>         struct renesas_sdhi *priv;
>         struct resource *res;
>         int irq, ret, i;
> +       u16 ver;
>
>         of_data = of_device_get_match_data(&pdev->dev);
>
> @@ -773,12 +774,17 @@ int renesas_sdhi_probe(struct platform_device *pdev,
>         if (ret)
>                 goto efree;
>
> +       ver = sd_ctrl_read16(host, CTL_VERSION);
> +       /* GEN2_SDR104 is first known SDHI to use 32bit block count */
> +       if (ver < SDHI_VER_GEN2_SDR104 && mmc_data->max_blk_count > U16_MAX)
> +               mmc_data->max_blk_count = U16_MAX;
> +
>         ret = tmio_mmc_host_probe(host);
>         if (ret < 0)
>                 goto edisclk;
>
>         /* One Gen2 SDHI incarnation does NOT have a CBSY bit */
> -       if (sd_ctrl_read16(host, CTL_VERSION) == SDHI_VER_GEN2_SDR50)
> +       if (ver == SDHI_VER_GEN2_SDR50)
>                 mmc_data->flags &= ~TMIO_MMC_HAVE_CBSY;
>
>         /* Enable tuning iff we have an SCC and a supported mode */
> --
> 2.11.0
>



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