Re: regression caused by: "amlogic: mmc: meson-gx: add signal resampling"

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Am Do., 17. Jan. 2019 um 13:35 Uhr schrieb Andreas Fenkart <afenkart@xxxxxxxxx>:
>
> Hi Jerome

> > Here your eMMC timedout during init, so even before an attempt is made to tune
> > which is odd. Could you try to enable signal resampling only when going forhigh speed modes ?
>

card is found with this patch:

--- a/drivers/mmc/host/meson-gx-mmc.c
+++ b/drivers/mmc/host/meson-gx-mmc.c
@@ -432,12 +432,17 @@ static int meson_mmc_clk_set(struct meson_host
*host, struct mmc_ios *ios)
        struct mmc_host *mmc = host->mmc;
        unsigned long rate = ios->clock;
        int ret;
-       u32 cfg;
+       u32 cfg = 0, adj = 0;

        /* DDR modes require higher module clock */
        if (meson_mmc_timing_is_ddr(ios))
                rate <<= 1;

        /* Same request - bail-out */
        if (host->req_rate == rate)
                return 0;
@@ -475,6 +480,13 @@ static int meson_mmc_clk_set(struct meson_host
*host, struct mmc_ios *ios)
        if (ios->clock != mmc->actual_clock)
                dev_dbg(host->dev, "requested rate was %u\n", ios->clock);

+       if (rate >= 200000000) {
+               printk("enable signal resampling");
+               /* enable signal resampling w/o delay */
+               adj = ADJUST_ADJ_EN;
+               writel(adj, host->regs + host->data->adjust);
+       }
+
        /* (re)start clock */
        meson_mmc_clk_ungate(host);

/Andi



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