Re: 4.15.0-rc5 fails boot on MX53 LOCO board due to MMC (clock?) issue

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Dear Wladimir J. van der Laan,

On Thu, Jan 11, 2018 at 6:15 PM, Wladimir J. van der Laan
<laanwj@xxxxxxxxx> wrote:
> Hello,
>
> I'm experiencing issues with kernel 4.15.0-rc5 on a MX53 LOCO board.
>
> Setup is two 32GB Samsung microSD SDHC cards plugged in
>
> mmc0 plugged indirectly: contains boot and auxiliary data
> mmc1 through SD->microSD adapter that came with the card: contains root fs
>
> Initial error is "mmcblk1: error -84 transferring data, sector 2048, nr 8, cmd
> response 0x900, card status 0xc00".  Then various SDHCI REGISTER DUMP follow
> after timeouts and CRC errors. It looks like the filesystem is corrupting,
> resulting in a failed boot.
>
> Bisection gives me:
>
> 5143c953a7864c7abacf1c167c4350d641626949 is the first bad commit
> commit 5143c953a7864c7abacf1c167c4350d641626949
> Author: Benoît Thébaudeau <benoit@xxxxxxxxxxx>
> Date:   Tue May 30 11:14:10 2017 +0200
>
>     mmc: sdhci-esdhc-imx: Allow all supported prescaler values
>
>     On i.MX, SYSCTL.SDCLKFS may always be set to 0 in order to make the SD
>     clock frequency prescaler divide by 1 in SDR mode, even with the eSDHC.
>     The previous minimum prescaler value of 2 in SDR mode with the eSDHC was
>     a code remnant from PowerPC, which actually has this limitation on
>     earlier revisions.
>
>     In DDR mode, the prescaler can divide by up to 512.
>
>     The maximum SD clock frequency in High Speed mode is 50 MHz. On i.MX25,
>     this change makes it possible to get 48 MHz from the USB PLL
>     (240 MHz / 5 / 1) instead of only 40 MHz from the USB PLL
>     (240 MHz / 3 / 2) or 33.25 MHz from the AHB clock (133 MHz / 2 / 2).
>
>     Signed-off-by: Benoît Thébaudeau <benoit@xxxxxxxxxxx>
>     Acked-by: Adrian Hunter <adrian.hunter@xxxxxxxxx>
>     Reviewed-by: Fabio Estevam <fabio.estevam@xxxxxxx>
>     Signed-off-by: Ulf Hansson <ulf.hansson@xxxxxxxxxx>
>
> And indeed, after reverting this particular commit on top of 4.15.0-rc5, the problem goes away.
>
> This could be a clock rate tolerance issue with the particular brand/type of
> SD card, however I've not experienced any issues with them before.

[...]

In a few words, looking at the reference manual of the i.MX53, there
is an exception with its eSDHCv3: it does not allow SYSCTL.SDCLKFS =
0. It seems to be fine for the eSDHCv2 instances of the i.MX53 and for
all the other i.MXs. So your issue can be fixed by changing the
minimum legal prescaler value if eSDHCv3 is detected on i.MX53. I will
send something for that. This should also be fixed in U-Boot.

Best regards,
Benoît
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