On 07/10/16 08:08, Jaehoon Chung wrote:
> value of ios->timing is not related with SDCHI v3.0.
> If Controller version is v3.0, SDHCI_QUIRK_NO_HISPD_BIT is meaningless.
> To prevent the setting wrong bit moves into one codntion checking.
codntion -> condition
> (e.g sdhci-s3c doesn't use SDHCI_CTRL_HISPD bit, instead using this bit as
> other purpose.)
>
> Signed-off-by: Jaehoon Chung <jh80.chung@xxxxxxxxxxx>
Acked-by: Adrian Hunter <adrian.hunter@xxxxxxxxx>
> ---
> drivers/mmc/host/sdhci.c | 19 ++++++++-----------
> 1 file changed, 8 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index 4805566..f854c66 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -1619,7 +1619,14 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
> ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
>
> if ((ios->timing == MMC_TIMING_SD_HS ||
> - ios->timing == MMC_TIMING_MMC_HS)
> + ios->timing == MMC_TIMING_MMC_HS ||
> + ios->timing == MMC_TIMING_MMC_HS400 ||
> + ios->timing == MMC_TIMING_MMC_HS200 ||
> + ios->timing == MMC_TIMING_MMC_DDR52 ||
> + ios->timing == MMC_TIMING_UHS_SDR50 ||
> + ios->timing == MMC_TIMING_UHS_SDR104 ||
> + ios->timing == MMC_TIMING_UHS_DDR50 ||
> + ios->timing == MMC_TIMING_UHS_SDR25)
> && !(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT))
> ctrl |= SDHCI_CTRL_HISPD;
> else
> @@ -1628,16 +1635,6 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
> if (host->version >= SDHCI_SPEC_300) {
> u16 clk, ctrl_2;
>
> - /* In case of UHS-I modes, set High Speed Enable */
> - if ((ios->timing == MMC_TIMING_MMC_HS400) ||
> - (ios->timing == MMC_TIMING_MMC_HS200) ||
> - (ios->timing == MMC_TIMING_MMC_DDR52) ||
> - (ios->timing == MMC_TIMING_UHS_SDR50) ||
> - (ios->timing == MMC_TIMING_UHS_SDR104) ||
> - (ios->timing == MMC_TIMING_UHS_DDR50) ||
> - (ios->timing == MMC_TIMING_UHS_SDR25))
> - ctrl |= SDHCI_CTRL_HISPD;
> -
> if (!host->preset_enabled) {
> sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
> /*
>
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