Hi everyone, This series fixes and re-enables eMMC HS-DDR support for Allwinner A80 SoC. The issue with the original code was the mmc clock timings were incorrect, and thus we had disabled HS-DDR on A80 for the previous release. Patch 1 is a fix for mmc core. Arnd's patch to remove IS_ERR_VALUE replaced it with an incorrect check on return values, thus blocking the code path for HS-DDR and higher timing modes. This patch instead checks for a positive return code, which is how mmc_select_bus_width indicates a success. Patch 2 fixes the HS-DDR clock timings for the A80. Patch 3 re-enables HS-DDR mode for the A80. Regards ChenYu Chen-Yu Tsai (3): mmc: fix mmc mode selection for HS-DDR and higher mmc: sunxi: Fix DDR MMC timings for A80 mmc: sunxi: Re-enable eMMC HS-DDR modes on Allwinner A80 drivers/mmc/core/mmc.c | 4 ++-- drivers/mmc/host/sunxi-mmc.c | 9 ++------- 2 files changed, 4 insertions(+), 9 deletions(-) -- 2.8.1 -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
