From: Koji Matsuoka <koji.matsuoka.xm@xxxxxxxxxxx>
The clock should be enable when SDHI registers are accessed.
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@xxxxxxxxxxx>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@xxxxxxxxx>
---
This patch is based on mmc-next branch of Ulf Hansson's mmc tree.
* Perhaps this relates to the need to enhance clock management
drivers/mmc/host/sh_mmcif.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
index 5a1fdd4..ad9ffea 100644
--- a/drivers/mmc/host/sh_mmcif.c
+++ b/drivers/mmc/host/sh_mmcif.c
@@ -1632,7 +1632,9 @@ static int sh_mmcif_suspend(struct device *dev)
{
struct sh_mmcif_host *host = dev_get_drvdata(dev);
+ pm_runtime_get_sync(dev);
sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL);
+ pm_runtime_put(dev);
return 0;
}
--
1.9.1
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