Re: [PATCH] mmc: sdhci-pxav3: Fix Sparse warning of duplicate set_uhs_signaling entry

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Hi Ulf,

Is this good to go?

On Mon, Sep 29, 2014 at 6:55 PM, Pramod Gurav
<pramod.gurav@xxxxxxxxxxxxxxx> wrote:
> This fixes below sparse warning:
> drivers/mmc/host/sdhci-pxav3.c:227:10: warning: Initializer entry defined twice
> drivers/mmc/host/sdhci-pxav3.c:232:10:   also defined here
>
> by removing duplicate initialization of .set_uhs_signaling in
> struct sdhci_ops. Also does away with duplcated function.
>
> Cc: Russell King <rmk+kernel@xxxxxxxxxxxxxxxx>
> Cc: Ulf Hansson <ulf.hansson@xxxxxxxxxx>
> Cc: Chris Ball <chris@xxxxxxxxxx>
> Cc: linux-mmc@xxxxxxxxxxxxxxx
> Signed-off-by: Pramod Gurav <pramod.gurav@xxxxxxxxxxxxxxx>
> ---
>  drivers/mmc/host/sdhci-pxav3.c |   37 -------------------------------------
>  1 file changed, 37 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
> index 6f842fb..fd93e60 100644
> --- a/drivers/mmc/host/sdhci-pxav3.c
> +++ b/drivers/mmc/host/sdhci-pxav3.c
> @@ -186,45 +186,8 @@ static void pxav3_gen_init_74_clocks(struct sdhci_host *host, u8 power_mode)
>         pxa->power_mode = power_mode;
>  }
>
> -static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
> -{
> -       u16 ctrl_2;
> -
> -       /*
> -        * Set V18_EN -- UHS modes do not work without this.
> -        * does not change signaling voltage
> -        */
> -       ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
> -
> -       /* Select Bus Speed Mode for host */
> -       ctrl_2 &= ~SDHCI_CTRL_UHS_MASK;
> -       switch (uhs) {
> -       case MMC_TIMING_UHS_SDR12:
> -               ctrl_2 |= SDHCI_CTRL_UHS_SDR12;
> -               break;
> -       case MMC_TIMING_UHS_SDR25:
> -               ctrl_2 |= SDHCI_CTRL_UHS_SDR25;
> -               break;
> -       case MMC_TIMING_UHS_SDR50:
> -               ctrl_2 |= SDHCI_CTRL_UHS_SDR50 | SDHCI_CTRL_VDD_180;
> -               break;
> -       case MMC_TIMING_UHS_SDR104:
> -               ctrl_2 |= SDHCI_CTRL_UHS_SDR104 | SDHCI_CTRL_VDD_180;
> -               break;
> -       case MMC_TIMING_UHS_DDR50:
> -               ctrl_2 |= SDHCI_CTRL_UHS_DDR50 | SDHCI_CTRL_VDD_180;
> -               break;
> -       }
> -
> -       sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
> -       dev_dbg(mmc_dev(host->mmc),
> -               "%s uhs = %d, ctrl_2 = %04X\n",
> -               __func__, uhs, ctrl_2);
> -}
> -
>  static const struct sdhci_ops pxav3_sdhci_ops = {
>         .set_clock = sdhci_set_clock,
> -       .set_uhs_signaling = pxav3_set_uhs_signaling,
>         .platform_send_init_74_clocks = pxav3_gen_init_74_clocks,
>         .get_max_clock = sdhci_pltfm_clk_get_max_clock,
>         .set_bus_width = sdhci_set_bus_width,
> --
> 1.7.9.5
>
> --
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-- 
Thanks and Regards
Pramod
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