On 12/6/13 5:22 PM, Heiko Stübner wrote:
> Am Samstag, 7. Dezember 2013, 00:18:07 schrieb Dinh Nguyen:
>> On 12/6/13 5:14 PM, Heiko Stübner wrote:
>>> Am Freitag, 6. Dezember 2013, 17:10:23 schrieb dinguyen@xxxxxxxxxx:@@ -42,7 +42,7 @@
>>> /* Common flag combinations */
>>> #define DW_MCI_DATA_ERROR_FLAGS (SDMMC_INT_DRTO | SDMMC_INT_DCRC | \
>>> SDMMC_INT_HTO | SDMMC_INT_SBE | \
>>> - SDMMC_INT_EBE)
>>> + SDMMC_INT_EBE | SDMMC_INT_FRUN)
>>> #define DW_MCI_CMD_ERROR_FLAGS (SDMMC_INT_RTO | SDMMC_INT_RCRC | \
>>>> From: Dinh Nguyen <dinguyen@xxxxxxxxxx>
>>>>
>>>> Rockchip's implementation of the dw_mmc controller only requires the
>>>> setting of the SDMMC_CMD_USE_HOLD_REG on every command. With the patch
>>>> to set the SDMMC_CMD_USE_HOLD_REG by checking the slot's speed mode,
>>>> this Rockchip custom driver structure is no longer necessary.
>>>>
>>>> Signed-off-by: Dinh Nguyen <dinguyen@xxxxxxxxxx>
>>> hmm, testing will need a bit more time, as it seems one of the changes
>>> merged during the 3.13 merge window broke the dw-mmc on the rockchip.
>> Thanks Heiko. Don't bother with v1, I overlooked another aspect of using
>> the hold
>> reg. Let me send out a v2 for you to test.
> Don't worry ... as I've said, first I need to find the current issue :-)
What behavior are you seeing? I had to do this apply this for 3.13 when the
SD driver is using IDMAC:
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -42,7 +42,7 @@
/* Common flag combinations */
#define DW_MCI_DATA_ERROR_FLAGS (SDMMC_INT_DRTO | SDMMC_INT_DCRC | \
SDMMC_INT_HTO | SDMMC_INT_SBE | \
- SDMMC_INT_EBE)
+ SDMMC_INT_EBE | SDMMC_INT_FRUN)
#define DW_MCI_CMD_ERROR_FLAGS (SDMMC_INT_RTO | SDMMC_INT_RCRC | \
SDMMC_INT_RESP_ERR)
#define DW_MCI_ERROR_FLAGS (DW_MCI_DATA_ERROR_FLAGS | \
>
> Heiko
>
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