On Fri, Dec 14, 2012 at 03:38:46PM +0000, Pawel Moll wrote: > The Versatile Express IOFPGA as shipped on VECD 5.0 (bitfiles v108/208 > and v116/216) contains a modified version of the PL180 MMCI, with > PeriphID Configuration value changed to 0x2. > > This version adds an optional "hardware flow control" feature. When > enabled MMC card clock will be automatically disabled when FIFO is > about to over/underflow and re-enabled once the host retrieved some > data. This makes the controller immune to over/underrun errors caused > by big interrupt handling latencies. Wrong. It doesn't make it "immune", it just makes it less likely to occur - you just need a heavier workload to provoke it. "This makes the controller more immune to over/underrun errors caused by longer interrupt handling latencies" would be a more accurate statement. -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
