On Fri, Mar 11, 2011 at 6:18 PM, Pawel Moll <pawel.moll@xxxxxxx> wrote: > New IO FPGA implementation for Versatile Express boards contain > MMCI (PL180) cell with FIFO extended to 128 words (512 bytes). OK that's the quick fix, and deeper FIFOs are always nice. If your hardware engineers are listening, I suggest that hardware clock gating (as suggested in some earlier mail) plus DMA engine support will yet improve this by orders of magnitude and also bring you less errors. Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
