On Sun, Apr 27, 2014 at 05:20:25AM -0700, Hugh Dickins wrote:
> On Sun, 27 Apr 2014, Peter Zijlstra wrote:
> > Will the hardware fault when it does a translation and needs to update
> > the dirty/access bits while the PTE entry is !present?
>
> Yes - but I'm sure you know that, just not while you wrote the mail ;)
Possibly, but all of a sudden I was fearing hardware was 'creative' and
we'd need something along the lines of what Linus proposed:
entry = atomic_xchg(pte, 0);
flush_tlb();
entry |= *pte;
Or possible event:
*ptep = pte_wrprotect(*ptep);
flush_tlb();
entry = atomic_xchg(ptep, 0);
flush_tlb();
The horrible things one fears.. :-) The latter option would be required
if TLBs would have a write-back dirty bit cache, *shudder*.
> But it will not fault while it still has the entry in its TLB,
> with dirty (and access) bits set in that entry in its TLB.
>
> The problem is with those entries, which already have dirty set
> in the TLB, although it's now cleared in the page table itself.
>
> I'm answering this mail because it only seems to need "Yes";
> but well aware that I've not yet answered your yesterday's mail.
> Sorry, my yesterday had to be spent on... other stuff.
Yeah, not worries, I spend most of the weekend preparing and then having
a birthday party for my (now 3 year old) daughter :-)
> I'm sleeping at present (well, not quite) and preparing a reply in
> the interstices of my sleep - if I don't change my mind before
> answering, I still think shmem needs Linus's (or my) patch.
Oh, absolutely. I wasn't arguing it didn't need it. I was merely
pointing out that if one was to add to Linus' patch such that we'd only
do the force_flush for mapping_cap_account_dirty() we wouldn't need
extra things to deal with shmem.
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