Re: [PATCH v6 4/5] MCS Lock: Barrier corrections

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On Sat, Nov 23, 2013 at 12:21:13PM -0800, Linus Torvalds wrote:
> *SOME* assumption of mine must be wrong. But I don't see which one.

I haven't read your email in full detail yet, but one thing I did miss
was cache-snoops.

One of the reasons for failing transitive / multi-copy atomicity is that
CPUs might have different views of the memory state depending on from
which caches they can get snoops.

Eg. if CPU0 and CPU1 share a cache level but CPU2 does not, CPU1 might
observe a write before CPU2 can.

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