On Fri, Nov 22, 2013 at 5:36 PM, Paul E. McKenney
<paulmck@xxxxxxxxxxxxxxxxxx> wrote:
>
> So there is your example. It really can and does happen.
>
> Again, easy fix. Just change powerpc's smp_store_release() from lwsync
> to smp_mb(). That fixes the problem and doesn't hurt anyone but powerpc.
>
> OK?
Hmm. Ok
Except now I'm worried it can happen on x86 too because my mental
model was clearly wrong.
x86 does have that extra "Memory ordering obeys causality (memory
ordering respects transitive visibility)." rule, and the example in
the architecture manual (section 8.2.3.6 "Stores Are Transitively
Visible") seems to very much about this, but your particular example
is subtly different, so..
I will have to ruminate on this.
Linus
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