On 5/3/22 18:31, Wei Xu wrote: >> Well, x86 CPUs have performance monitoring hardware that can >> theoretically collect physical access information too. But, this >> performance monitoring hardware wasn't designed for this specific use >> case in mind. So, in practice, these events (PEBS) weren't very useful >> for driving memory tiering. > The PEBS events without any filtering might not be useful for memory > tiering, but the PEBS events with hardware-based data source filtering > can be useful in driving promotions in memory tiering. Certainly, > because these events are not designed for this specific use case in > mind, there are inefficiencies using them for memory tiering, e.g. > instead of just getting a heat counter for each hot page, we can get > events repeatedly on the hot pages. Also, I believe the addresses that come out of the PEBS events are virtual addresses (Data Linear Addresses according to the SDM). If the events are written from a KVM guest, you get guest linear addresses. That means a lot of page table and EPT walks to map those linear addresses back to physical. That adds to the inefficiency. In the end, you get big PEBS buffers with lots of irrelevant data that needs significant post-processing to make sense of it. The folks at Intel that tried this really struggled to take this mess and turn it into a successful hot-page tracking. Maybe someone else will find a better way to do it, but we tried and gave up.
