On Mon, Aug 16, 2021 at 12:53:46PM -0700, Vineet Gupta wrote:
> On 8/15/21 2:27 AM, Mike Rapoport wrote:
> > On Thu, Aug 12, 2021 at 04:37:50PM -0700, Vineet Gupta wrote:
> > > ARCv2 MMU is software walked and Linux implements 2 levels of paging: pgd/pte.
> > > Forthcoming hw will have multiple levels, so this change preps mm code
> > > for same. It is also fun to try multi levels even on soft-walked code to
> > > ensure generic mm code is robust to handle.
> > >
> > > overview
> > > ________
> > >
> > > 2 levels {pgd, pte} : pmd is folded but pmd_* macros are valid and operate on pgd
> > > 3 levels {pgd, pmd, pte}:
> > > - pud is folded and pud_* macros point to pgd
> > > - pmd_* macros operate on actual pmd
> > >
> > > code changes
> > > ____________
> > >
> > > 1. #include <asm-generic/pgtable-nopud.h>
> > >
> > > 2. Define CONFIG_PGTABLE_LEVELS 3
> > >
> > > 3a. Define PMD_SHIFT, PMD_SIZE, PMD_MASK, pmd_t
> > > 3b. Define pmd_val() which actually deals with pmd
> > > (pmd_offset(), pmd_index() are provided by generic code)
> > > 3c. pmd_alloc_one()/pmd_free() also provided by generic code
> > > (pmd_populate/pmd_free already exist)
> > >
> > > 4. Define pud_none(), pud_bad() macros based on generic pud_val() which
> > > internally pertains to pgd now.
> > > 4b. define pud_populate() to just setup pgd
> > >
> > > Signed-off-by: Vineet Gupta <vgupta@xxxxxxxxxx>
> > > ---
> > ...
> >
> > > diff --git a/arch/arc/include/asm/pgtable-levels.h b/arch/arc/include/asm/pgtable-levels.h
> > > index 8ece75335bb5..1c2f022d4ad0 100644
> > > --- a/arch/arc/include/asm/pgtable-levels.h
> > > +++ b/arch/arc/include/asm/pgtable-levels.h
> > > @@ -10,6 +10,8 @@
> > > #ifndef _ASM_ARC_PGTABLE_LEVELS_H
> > > #define _ASM_ARC_PGTABLE_LEVELS_H
> > > +#if CONFIG_PGTABLE_LEVELS == 2
> > > +
> > > /*
> > > * 2 level paging setup for software walked MMUv3 (ARC700) and MMUv4 (HS)
> > > *
> > > @@ -37,16 +39,38 @@
> > > #define PGDIR_SHIFT 21
> > > #endif
> > > -#define PGDIR_SIZE BIT(PGDIR_SHIFT) /* vaddr span, not PDG sz */
> > > -#define PGDIR_MASK (~(PGDIR_SIZE - 1))
> > > +#else
> > Adding /* CONFIG_PGTABLE_LEVELS == 2 */ would make the whole thing a bit
> > more readable, I think.
>
> You meant
>
> +#else /* CONFIG_PGTABLE_LEVELS != 2
I don't think we are consistent about it in the kernel, there are places
that just copy the condition in #if and some change it to match the #else.
I don't have a preference, up to you.
> >
> > > +
> > > +/*
> > > + * A default 3 level paging testing setup in software walked MMU
> > > + * MMUv4 (8K page): <4> : <7> : <8> : <13>
> > > + */
> > > +#define PGDIR_SHIFT 28
> > > +#if CONFIG_PGTABLE_LEVELS > 2
> > > +#define PMD_SHIFT 21
> > > +#endif
> > > +
> > > +#endif
> > and here as well.
>
> I added following to indicate conditional coding for levels related code
>
> +#endif /* CONFIG_PGTABLE_LEVELS */
>
>
> > > +#define PGDIR_SIZE BIT(PGDIR_SHIFT)
> > > +#define PGDIR_MASK (~(PGDIR_SIZE - 1))
> > > #define PTRS_PER_PGD BIT(32 - PGDIR_SHIFT)
> > > -#define PTRS_PER_PTE BIT(PGDIR_SHIFT - PAGE_SHIFT)
> > > +#if CONFIG_PGTABLE_LEVELS > 2
> > > +#define PMD_SIZE BIT(PMD_SHIFT)
> > > +#define PMD_MASK (~(PMD_SIZE - 1))
> > > +#define PTRS_PER_PMD BIT(PGDIR_SHIFT - PMD_SHIFT)
> > > +#endif
> > > +
> > > +#define PTRS_PER_PTE BIT(PMD_SHIFT - PAGE_SHIFT)
>
--
Sincerely yours,
Mike.
