On Sun, Feb 07, 2021 at 09:24:23AM +0100, Dmitry Vyukov wrote: > On Fri, Feb 5, 2021 at 4:16 PM Kirill A. Shutemov > <kirill.shutemov@xxxxxxxxxxxxxxx> wrote: > > > > Linear Address Masking[1] (LAM) modifies the checking that is applied to > > 64-bit linear addresses, allowing software to use of the untranslated > > address bits for metadata. > > > > The patchset brings support for LAM for userspace addresses. > > > > The most sensitive part of enabling is change in tlb.c, where CR3 flags > > get set. Please take a look that what I'm doing makes sense. > > > > The patchset is RFC quality and the code requires more testing before it > > can be applied. > > > > The userspace API is not finalized yet. The patchset extends API used by > > ARM64: PR_GET/SET_TAGGED_ADDR_CTRL. The API is adjusted to not imply ARM > > TBI: it now allows to request a number of bits of metadata needed and > > report where these bits are located in the address. > > > > There's an alternative proposal[2] for the API based on Intel CET > > interface. Please let us know if you prefer one over another. > > > > The feature competes for bits with 5-level paging: LAM_U48 makes it > > impossible to map anything about 47-bits. The patchset made these > > capability mutually exclusive: whatever used first wins. LAM_U57 can be > > combined with mappings above 47-bits. > > > > I include QEMU patch in case if somebody wants to play with the feature. > > Exciting! Do you plan to send the QEMU patch to QEMU? Sure. After more testing, once I'm sure it's conforming to the hardware. -- Kirill A. Shutemov
