On Mon, 2011-06-13 at 14:29 +0530, Srikar Dronamraju wrote:
> * Peter Zijlstra <peterz@xxxxxxxxxxxxx> [2011-06-10 01:03:29]:
>
> > On Tue, 2011-06-07 at 18:28 +0530, Srikar Dronamraju wrote:
> > > + vaddr_old = kmap_atomic(old_page, KM_USER0);
> > > + vaddr_new = kmap_atomic(new_page, KM_USER1);
> > > +
> > > + memcpy(vaddr_new, vaddr_old, PAGE_SIZE);
> > > + /* poke the new insn in, ASSUMES we don't cross page boundary */
> > > + addr = vaddr;
> > > + vaddr &= ~PAGE_MASK;
> > > + memcpy(vaddr_new + vaddr, &opcode, uprobe_opcode_sz);
> > > +
> > > + kunmap_atomic(vaddr_new);
> > > + kunmap_atomic(vaddr_old);
> >
> >
> > > + vaddr_new = kmap_atomic(page, KM_USER0);
> > > + vaddr &= ~PAGE_MASK;
> > > + memcpy(opcode, vaddr_new + vaddr, uprobe_opcode_sz);
> > > + kunmap_atomic(vaddr_new);
> > >
>
>
> >
> > Both sequences in resp {write,read}_opcode() assume the opcode doesn't
> > cross page boundaries but don't in fact have any assertions validating
> > this assumption.
> >
>
> read_opcode and write_opcode reads/writes just one breakpoint instruction
> I had the below note just above the write_opcode definition.
>
> /*
> * NOTE:
> * Expect the breakpoint instruction to be the smallest size instruction for
> * the architecture. If an arch has variable length instruction and the
> * breakpoint instruction is not of the smallest length instruction
> * supported by that architecture then we need to modify read_opcode /
> * write_opcode accordingly. This would never be a problem for archs that
> * have fixed length instructions.
> */
Whoever reads comments anyway? :-)
> Do we have archs which have a breakpoint instruction which isnt of the
> smallest instruction size for that arch. If we do have can we change the
> write_opcode/read_opcode while we support that architecture?
Why not put a simple WARN_ON_ONCE() in there that checks the assumption?
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