Hello Arnd, Geert,
> From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> Sent: 16 February 2020 09:45
> To: Arnd Bergmann <arnd@xxxxxxxx>
>
> Hi Arnd,
>
> On Sat, Feb 15, 2020 at 5:59 PM Arnd Bergmann <arnd@xxxxxxxx> wrote:
> > On Sat, Feb 15, 2020 at 12:25 PM Geert Uytterhoeven
> > <geert@xxxxxxxxxxxxxx> wrote:
> > > On Thu, Feb 13, 2020 at 5:54 PM Arnd Bergmann <arnd@xxxxxxxx>
> wrote:
> > > > On Wed, Feb 12, 2020 at 9:50 AM Russell King - ARM Linux admin
> > > > <linux@xxxxxxxxxxxxxxx> wrote:
> > >
> > > The CIP-supported RZ/G1 SoCs can have up to 4 GiB, typically split (even
> > > for 1 GiB or 2 GiB configurations) in two parts, one below and one above
> > > the 32-bit physical limit.
Yep. One example is r8a7743-iwg20m.dtsi.
> >
> > Good to know. I think there are several other chips that have dual-channel
> > DDR3 and thus /can/ support this configuration, but this rarely happens.
> > Are you aware of commercial products that use a 4GB configuration, aside
> from
> > the reference board?
iWave Systems make a range of SOM modules using the RZ/G1 SoCs.
I believe there are options for some of these to use 4 GB, although 1 or 2 GB is used in the boards we've upstreamed support for.
There are also other SOM vendors (e.g. Emtrion) and end users of RZ/G1, but I'm not sure of the details.
Kind regards, Chris
>
> Unfortunately I don't know.
> Chris Paterson might know.
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
