On Sat, Feb 15, 2020 at 12:25 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote: > On Thu, Feb 13, 2020 at 5:54 PM Arnd Bergmann <arnd@xxxxxxxx> wrote: > > On Wed, Feb 12, 2020 at 9:50 AM Russell King - ARM Linux admin > > <linux@xxxxxxxxxxxxxxx> wrote: > > The CIP-supported RZ/G1 SoCs can have up to 4 GiB, typically split (even > for 1 GiB or 2 GiB configurations) in two parts, one below and one above > the 32-bit physical limit. Good to know. I think there are several other chips that have dual-channel DDR3 and thus /can/ support this configuration, but this rarely happens. Are you aware of commercial products that use a 4GB configuration, aside from the reference board? For TI AM54x, there is apparently a variant of the Dragonbox Pyro with 4G, which is said to be shipping in the near future, see https://en.wikipedia.org/wiki/DragonBox_Pyra Arnd
