Re: [slubllv5 07/25] x86: Add support for cmpxchg_double

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Le jeudi 26 mai 2011 Ã 14:31 -0700, H. Peter Anvin a Ãcrit :
> On 05/26/2011 02:25 PM, Eric Dumazet wrote:
> >>
> >> +#define cmpxchg16b(ptr, o1, o2, n1, n2)				\
> >> +({								\
> >> +	char __ret;						\
> >> +	__typeof__(o2) __junk;					\
> >> +	__typeof__(*(ptr)) __old1 = (o1);			\
> >> +	__typeof__(o2) __old2 = (o2);				\
> >> +	__typeof__(*(ptr)) __new1 = (n1);			\
> >> +	__typeof__(o2) __new2 = (n2);				\
> >> +	asm volatile(LOCK_PREFIX_HERE "lock; cmpxchg16b (%%rsi);setz %1" \
> > 
> > If there is no emulation, why do you force rsi here ?
> > 
> > It could be something else, like "=m" (*ptr) ?
> > 
> > (same remark for other functions)
> > 
> 
> "+m" (*ptr) please...
> 
> 	-hpa

Oh well, I guess I was fooled by :

 (arch/x86/include/asm/cmpxchg_32.h)

static inline void set_64bit(volatile u64 *ptr, u64 value)
{
        u32 low  = value;
        u32 high = value >> 32;
        u64 prev = *ptr;

        asm volatile("\n1:\t"
                     LOCK_PREFIX "cmpxchg8b %0\n\t"
                     "jnz 1b"
                     : "=m" (*ptr), "+A" (prev)
                     : "b" (low), "c" (high)
                     : "memory");
}



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