Re: [PATCH RESEND] mips: switch to NO_BOOTMEM

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Hi Mike,

On Mon, Aug 27, 2018 at 10:59:35AM +0300, Mike Rapoport wrote:
> MIPS already has memblock support and all the memory is already registered
> with it.
> 
> This patch replaces bootmem memory reservations with memblock ones and
> removes the bootmem initialization.
> 
> Signed-off-by: Mike Rapoport <rppt@xxxxxxxxxxxxxxxxxx>
> ---
> 
>  arch/mips/Kconfig                      |  1 +
>  arch/mips/kernel/setup.c               | 89 +++++-----------------------------
>  arch/mips/loongson64/loongson-3/numa.c | 34 ++++++-------
>  arch/mips/sgi-ip27/ip27-memory.c       | 11 ++---
>  4 files changed, 33 insertions(+), 102 deletions(-)

Thanks for working on this. Unfortunately it breaks boot for at least a
32r6el_defconfig kernel on QEMU:

  $ qemu-system-mips64el \
    -M boston \
    -kernel arch/mips/boot/vmlinux.gz.itb \
    -serial stdio \
    -append "earlycon=uart8250,mmio32,0x17ffe000,115200 console=ttyS0,115200 debug memblock=debug mminit_loglevel=4"
  [    0.000000] Linux version 4.19.0-rc1-00008-g82d0f342eecd (pburton@pburton-laptop) (gcc version 8.1.0 (GCC)) #23 SMP Thu Aug 30 14:38:06 PDT 2018
  [    0.000000] CPU0 revision is: 0001a900 (MIPS I6400)
  [    0.000000] FPU revision is: 20f30300
  [    0.000000] MSA revision is: 00000300
  [    0.000000] MIPS: machine is img,boston
  [    0.000000] Determined physical RAM map:
  [    0.000000]  memory: 10000000 @ 00000000 (usable)
  [    0.000000]  memory: 30000000 @ 90000000 (usable)
  [    0.000000] earlycon: uart8250 at MMIO32 0x17ffe000 (options '115200')
  [    0.000000] bootconsole [uart8250] enabled
  [    0.000000] memblock_reserve: [0x00000000-0x009a8fff] setup_arch+0x224/0x718
  [    0.000000] memblock_reserve: [0x01360000-0x01361ca7] setup_arch+0x3d8/0x718
  [    0.000000] Initrd not found or empty - disabling initrd
  [    0.000000] memblock_virt_alloc_try_nid: 7336 bytes align=0x40 nid=-1 from=0x00000000 max_addr=0x00000000 early_init_dt_alloc_memory_arch+0x20/0x2c
  [    0.000000] memblock_reserve: [0xbfffe340-0xbfffffe7] memblock_virt_alloc_internal+0x120/0x1ec
  <hang>

It looks like we took a TLB store exception after calling memset() with
a bogus address from memblock_virt_alloc_try_nid() or something inlined
into it.

This was with your patch applied atop the mips-next branch from [1],
which is currently at commit 35d017947401 ("MIPS: ralink: Add rt3352
SPI_CS1 pinmux").

Thanks,
    Paul

[1] git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git




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