On Tue, 12 Jun 2018 16:26:33 -0700 Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx> wrote: > On Tue, Jun 12, 2018 at 4:09 PM Nicholas Piggin <npiggin@xxxxxxxxx> wrote: > > > > Sorry I mean Intel needs the existing behaviour of range flush expanded > > to cover page table pages.... right? > > Right. Intel depends on the current thing, ie if a page table > *itself* is freed, we will will need to do a flush, but it's the exact > same flush as if there had been a regular page there. > > That's already handled by (for example) pud_free_tlb() doing the > __tlb_adjust_range(). Agreed. > > Again, I may be missing entirely what you're talking about, because it > feels like we're talking across each other. > > My argument is that your new patches in (2-3 in the series - patch #1 > looks ok) seem to be fundamentally specific to things that have a > *different* tlb invalidation for the directory entries than for the > leaf entries. Yes I think I confused myself a bit. You're right these patches are only useful if there is no page structure cache, or if it's managed separately from TLB invalidation. > > But that's not what at least x86 has, and not what the generic code has done. > > I think it might be fine to introduce a few new helpers that end up > being no-ops for the traditional cases. > > I just don't think it makes sense to maintain a set of range values > that then aren't actually used in the general case. Sure, I'll make it optional. That would probably give a better result for powerpc too because it doesn't need to maintain two ranges either. Thanks, Nick
